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Ciro Santilli 六四事件 法轮功
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@@ -870,6 +870,7 @@ body.book #toc,body.book #preamble,body.book h1.sect0,body.book .sect1>h2{page-b
<li><a href="#oops">15.7.2. Kernel oops</a></li>
<li><a href="#dump-stack">15.7.3. dump_stack</a></li>
<li><a href="#warn-on">15.7.4. WARN_ON</a></li>
<li><a href="#not-syncing">15.7.5. not syncing: VFS: Unable to mount root fs on unknown-block(0,0)</a></li>
</ul>
</li>
<li><a href="#pseudo-filesystems">15.8. Pseudo filesystems</a>
@@ -1174,10 +1175,14 @@ body.book #toc,body.book #preamble,body.book h1.sect0,body.book .sect1>h2{page-b
</li>
<li><a href="#gem5-cpu-types">19.17. gem5 CPU types</a>
<ul class="sectlevel3">
<li><a href="#gem5-basesimplecpu">19.17.1. gem5 BaseSimpleCPU</a></li>
<li><a href="#gem5-minorcpu">19.17.2. gem5 MinorCPU</a></li>
<li><a href="#gem5-deriveo3cpu">19.17.3. gem5 DeriveO3CPU</a></li>
<li><a href="#gem5-arm-rsk">19.17.4. gem5 ARM RSK</a></li>
<li><a href="#list-gem5-cpu-types">19.17.1. List gem5 CPU types</a>
<ul class="sectlevel4">
<li><a href="#gem5-basesimplecpu">19.17.1.1. gem5 BaseSimpleCPU</a></li>
<li><a href="#gem5-minorcpu">19.17.1.2. gem5 MinorCPU</a></li>
<li><a href="#gem5-deriveo3cpu">19.17.1.3. gem5 DeriveO3CPU</a></li>
</ul>
</li>
<li><a href="#gem5-arm-rsk">19.17.2. gem5 ARM RSK</a></li>
</ul>
</li>
<li><a href="#gem5-arm-platforms">19.18. gem5 ARM platforms</a></li>
@@ -1314,7 +1319,9 @@ body.book #toc,body.book #preamble,body.book h1.sect0,body.book .sect1>h2{page-b
</li>
<li><a href="#interpreted-languages">21.6. Interpreted languages</a>
<ul class="sectlevel3">
<li><a href="#node-js">21.6.1. Node.js</a></li>
<li><a href="#python">21.6.1. Python</a></li>
<li><a href="#node-js">21.6.2. Node.js</a></li>
<li><a href="#java">21.6.3. Java</a></li>
</ul>
</li>
<li><a href="#algorithms">21.7. Algorithms</a>
@@ -1717,8 +1724,9 @@ body.book #toc,body.book #preamble,body.book h1.sect0,body.book .sect1>h2{page-b
<li><a href="#arm-multicore">27.8.3. ARM multicore</a>
<ul class="sectlevel4">
<li><a href="#arm-wfe-and-sev-instructions">27.8.3.1. ARM WFE and SEV instructions</a></li>
<li><a href="#arm-psci">27.8.3.2. ARM PSCI</a></li>
<li><a href="#arm-dmb-instruction">27.8.3.3. ARM DMB instruction</a></li>
<li><a href="#arm-ldaxr-and-stlxr-instructions">27.8.3.2. ARM LDAXR and STLXR instructions</a></li>
<li><a href="#arm-psci">27.8.3.3. ARM PSCI</a></li>
<li><a href="#arm-dmb-instruction">27.8.3.4. ARM DMB instruction</a></li>
</ul>
</li>
<li><a href="#arm-timer">27.8.4. ARM timer</a></li>
@@ -11594,6 +11602,53 @@ insmod warn_on.ko</pre>
<p>Can also be activated with the <code>panic_on_warn</code> boot parameter.</p>
</div>
</div>
<div class="sect3">
<h4 id="not-syncing"><a class="anchor" href="#not-syncing"></a><a class="link" href="#not-syncing">15.7.5. not syncing: VFS: Unable to mount root fs on unknown-block(0,0)</a></h4>
<div class="paragraph">
<p>Let&#8217;s learn how to diagnose problems with the root filesystem not being found. TODO add a sample panic error message for each error type:</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="https://askubuntu.com/questions/41930/kernel-panic-not-syncing-vfs-unable-to-mount-root-fs-on-unknown-block0-0/1048477#1048477" class="bare">https://askubuntu.com/questions/41930/kernel-panic-not-syncing-vfs-unable-to-mount-root-fs-on-unknown-block0-0/1048477#1048477</a></p>
</li>
</ul>
</div>
<div class="paragraph">
<p>This is the diagnosis procedure:</p>
</div>
<div class="ulist">
<ul>
<li>
<p>does the filesystem appear on the list of filesystems? If not, then likely you are missing either:</p>
<div class="ulist">
<ul>
<li>
<p>the driver for that hardware type, e.g. hard drive / SSD type. Here, Linux does not know how to communicate with a given hardware to get bytes from it at all. In simiulation, the most important often missing one is virtio which needs:</p>
<div class="literalblock">
<div class="content">
<pre>CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_BLK=y</pre>
</div>
</div>
</li>
<li>
<p>the driver for that filesystem type. Here, Linux can read bytes from the hardware, but cannot interpret them as a tree of files because it does not recognize the file system format. For example, to boot from <a href="#squashfs">SquashFS</a> we would need:</p>
<div class="literalblock">
<div class="content">
<pre>CONFIG_SQUASHFS=y</pre>
</div>
</div>
</li>
</ul>
</div>
</li>
<li>
<p>your filesystem of interest appears in the list, then you just need to set the <code>root</code> <a href="#kernel-command-line-parameters">command line parameter</a> to point to that, e.g. <code>root=/dev/sda</code></p>
</li>
</ul>
</div>
</div>
</div>
<div class="sect2">
<h3 id="pseudo-filesystems"><a class="anchor" href="#pseudo-filesystems"></a><a class="link" href="#pseudo-filesystems">15.8. Pseudo filesystems</a></h3>
@@ -19674,11 +19729,20 @@ clock=500</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./gem5-regression --arch aarch64 -- --length quick</pre>
<pre>./build-gem5 --arch aarch64
./gem5-regression --arch aarch64 -- --length quick --length long</pre>
</div>
</div>
<div class="paragraph">
<p>TODO skip the build by default with <code>--skip-build</code> since we already manage it with <code>./build-gem5</code>. But we can&#8217;t do this because it is the build step that downloads the test binaries. We need to find a way to either download the binaries without building, or to pass the exact same scons build options through <code>test/main.py</code>.</p>
<p>After the first run has downloaded the test binaries for you, you can speed up the process a little bit by skipping an useless scons call:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./gem5-regression --arch aarch64 -- --length quick --length long --skip-build</pre>
</div>
</div>
<div class="paragraph">
<p>Note however that <code>--skip-build</code> is required at least once per branch to download the test binaries, because the test interface is bad.</p>
</div>
</div>
<div class="sect2">
@@ -19977,10 +20041,31 @@ Indirect leak of 1346 byte(s) in 2 object(s) allocated from:
<p>In fs.py and se.py, those are selectable with the <code>--cpu-type</code> option.</p>
</div>
<div class="paragraph">
<p>TODO are there any public performance correlations between those models and real cores? The information to make accurate models isn&#8217;t generally public for non-free CPUs, so either you must either rely vendor provided models or on experiments/reverse engineering.</p>
<p>The information to make highly accurate models isn&#8217;t generally public for non-free CPUs, so either you must either rely vendor provided models or on experiments/reverse engineering.</p>
</div>
<div class="paragraph">
<p>There is no simple answer for "what is the best CPU", in theory you have to understand each model and decide which one is closer your target system.</p>
</div>
<div class="paragraph">
<p>Whenever possible, stick to:</p>
</div>
<div class="ulist">
<ul>
<li>
<p>vendor provide ones obviously, e.g. ARM Holdings models of ARM cores, unless there is good reason not to, as they are the most likely to be accurate</p>
</li>
<li>
<p>newer models instead of older models</p>
</li>
</ul>
</div>
<div class="paragraph">
<p>Both of those can be checked with <code>git log</code> and <code>git blame</code>.</p>
</div>
<div class="sect3">
<h4 id="gem5-basesimplecpu"><a class="anchor" href="#gem5-basesimplecpu"></a><a class="link" href="#gem5-basesimplecpu">19.17.1. gem5 BaseSimpleCPU</a></h4>
<h4 id="list-gem5-cpu-types"><a class="anchor" href="#list-gem5-cpu-types"></a><a class="link" href="#list-gem5-cpu-types">19.17.1. List gem5 CPU types</a></h4>
<div class="sect4">
<h5 id="gem5-basesimplecpu"><a class="anchor" href="#gem5-basesimplecpu"></a><a class="link" href="#gem5-basesimplecpu">19.17.1.1. gem5 BaseSimpleCPU</a></h5>
<div class="paragraph">
<p>Simple abstract CPU without a pipeline.</p>
</div>
@@ -20016,8 +20101,8 @@ Indirect leak of 1346 byte(s) in 2 object(s) allocated from:
<p><a href="#gem5-kvm">KVM CPUs</a> are an alternative way of fast forwarding boot when they work.</p>
</div>
</div>
<div class="sect3">
<h4 id="gem5-minorcpu"><a class="anchor" href="#gem5-minorcpu"></a><a class="link" href="#gem5-minorcpu">19.17.2. gem5 MinorCPU</a></h4>
<div class="sect4">
<h5 id="gem5-minorcpu"><a class="anchor" href="#gem5-minorcpu"></a><a class="link" href="#gem5-minorcpu">19.17.1.2. gem5 MinorCPU</a></h5>
<div class="paragraph">
<p>Generic in-order core that does not model any specific CPU.</p>
</div>
@@ -20073,11 +20158,20 @@ Indirect leak of 1346 byte(s) in 2 object(s) allocated from:
<p>Implemented by Pierre-Yves Péneau from LIRMM, which is a research lab in Montpellier, France, in 2017.</p>
</div>
</li>
<li>
<p><code>O3_ARM_v7a</code>: implemented by Ronald Dreslinski from the <a href="https://en.wikipedia.org/wiki/University_of_Michigan">University of Michigan</a> in 2012</p>
<div class="paragraph">
<p>Not sure why it has v7a in the name, since I believe the CPUs are just the microarchitectural implementation of any ISA, and the v8 hello world did run.</p>
</div>
<div class="paragraph">
<p>The CLI option is named slightly differently as: <code>--cpu-type O3_ARM_v7a_3</code>.</p>
</div>
</li>
</ul>
</div>
</div>
<div class="sect3">
<h4 id="gem5-deriveo3cpu"><a class="anchor" href="#gem5-deriveo3cpu"></a><a class="link" href="#gem5-deriveo3cpu">19.17.3. gem5 DeriveO3CPU</a></h4>
<div class="sect4">
<h5 id="gem5-deriveo3cpu"><a class="anchor" href="#gem5-deriveo3cpu"></a><a class="link" href="#gem5-deriveo3cpu">19.17.1.3. gem5 DeriveO3CPU</a></h5>
<div class="paragraph">
<p>Generic out-of-order core. "O3" Stands for "Out Of Order"!</p>
</div>
@@ -20102,8 +20196,9 @@ Indirect leak of 1346 byte(s) in 2 object(s) allocated from:
</ul>
</div>
</div>
</div>
<div class="sect3">
<h4 id="gem5-arm-rsk"><a class="anchor" href="#gem5-arm-rsk"></a><a class="link" href="#gem5-arm-rsk">19.17.4. gem5 ARM RSK</a></h4>
<h4 id="gem5-arm-rsk"><a class="anchor" href="#gem5-arm-rsk"></a><a class="link" href="#gem5-arm-rsk">19.17.2. gem5 ARM RSK</a></h4>
<div class="paragraph">
<p><a href="https://github.com/arm-university/arm-gem5-rsk/blob/aa3b51b175a0f3b6e75c9c856092ae0c8f2a7cdc/gem5_rsk.pdf" class="bare">https://github.com/arm-university/arm-gem5-rsk/blob/aa3b51b175a0f3b6e75c9c856092ae0c8f2a7cdc/gem5_rsk.pdf</a></p>
</div>
@@ -21475,7 +21570,7 @@ build/ARM/config/the_isa.hh
<p>the first build takes a while, but it is well worth it</p>
</li>
<li>
<p>the selection of software packages is relatively limited if compared to Debian, e.g. no Java or Python package in guest out of the box.</p>
<p>the selection of software packages is relatively limited if compared to Debian.</p>
<div class="paragraph">
<p>In theory, any software can be packaged, and the Buildroot side is easy.</p>
</div>
@@ -23193,15 +23288,98 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
<div class="sect2">
<h3 id="interpreted-languages"><a class="anchor" href="#interpreted-languages"></a><a class="link" href="#interpreted-languages">21.6. Interpreted languages</a></h3>
<div class="paragraph">
<p>Maybe some day someone will use this setup to study the performance of interpreters:</p>
<p>Maybe some day someone will use this setup to study the performance of interpreters.</p>
</div>
<div class="sect3">
<h4 id="node-js"><a class="anchor" href="#node-js"></a><a class="link" href="#node-js">21.6.1. Node.js</a></h4>
<h4 id="python"><a class="anchor" href="#python"></a><a class="link" href="#python">21.6.1. Python</a></h4>
<div class="paragraph">
<p>Parent section: <a href="#interpreted-languages">Interpreted languages</a>.</p>
<p>Build and install the interpreter on the target:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./build-buildroot --config 'BR2_PACKAGE_PYTHON3=y'</pre>
</div>
</div>
<div class="paragraph">
<p>Install the interpreter with:</p>
<p>Usage from guest in full system:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run</pre>
</div>
</div>
<div class="paragraph">
<p>and then from there get an interactive shell with:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>python3</pre>
</div>
</div>
<div class="paragraph">
<p>or run an example with:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>python3 lkmc/python/hello.py</pre>
</div>
</div>
<div class="paragraph">
<p><a href="#user-mode-simulation">User mode simulation</a> interactive usage:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland "$(./getvar buildroot_target_dir)/usr/bin/python3"</pre>
</div>
</div>
<div class="paragraph">
<p>Non-interactive usage:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland "$(./getvar buildroot_target_dir)/usr/bin/python3" --userland-args rootfs_overlay/lkmc/python/hello.py</pre>
</div>
</div>
<div class="paragraph">
<p>LKMC 50ac89b779363774325c81157ec8b9a6bdb50a2f gem5 390a74f59934b85d91489f8a563450d8321b602da arch64:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run \
--arch aarch64 \
--emulator gem5 \
--userland "$(./getvar \
--arch aarch64 buildroot_target_dir)/usr/bin/python3" \
--userland-args rootfs_overlay/lkmc/python/hello.py \
;</pre>
</div>
</div>
<div class="paragraph">
<p>fails with:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>fatal: syscall unused#278 (#278) unimplemented.</pre>
</div>
</div>
<div class="paragraph">
<p>which corresponds to the glorious <code>getrandom</code> syscall: <a href="https://github.com/torvalds/linux/blob/v4.17/include/uapi/asm-generic/unistd.h#L707" class="bare">https://github.com/torvalds/linux/blob/v4.17/include/uapi/asm-generic/unistd.h#L707</a></p>
</div>
<div class="paragraph">
<p>Examples:</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/rootfs_overlay/lkmc/python/hello.py">rootfs_overlay/lkmc/python/hello.py</a>: hello world</p>
</li>
</ul>
</div>
</div>
<div class="sect3">
<h4 id="node-js"><a class="anchor" href="#node-js"></a><a class="link" href="#node-js">21.6.2. Node.js</a></h4>
<div class="paragraph">
<p>Build and install the interpreter with:</p>
</div>
<div class="literalblock">
<div class="content">
@@ -23209,7 +23387,10 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
</div>
</div>
<div class="paragraph">
<p>TODO: broken as of 3c3deb14dc8d6511680595dc42cb627d5781746d + 1:</p>
<p>Everything is then the same as the <a href="#python">Python</a> interpreter setup, except that the executable name is now <code>node</code>!</p>
</div>
<div class="paragraph">
<p>TODO: build broken as of LKMC 3c3deb14dc8d6511680595dc42cb627d5781746d + 1:</p>
</div>
<div class="literalblock">
<div class="content">
@@ -23222,6 +23403,9 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
<div class="ulist">
<ul>
<li>
<p><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/rootfs_overlay/lkmc/nodejs/hello.js">rootfs_overlay/lkmc/nodejs/hello.js</a>: hello world</p>
</li>
<li>
<p>String</p>
<div class="ulist">
<ul>
@@ -23257,6 +23441,21 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
</ul>
</div>
</div>
<div class="sect3">
<h4 id="java"><a class="anchor" href="#java"></a><a class="link" href="#java">21.6.3. Java</a></h4>
<div class="paragraph">
<p>No OpenJDK package as of 2018.08: <a href="https://stackoverflow.com/questions/28874150/buildroot-with-jamvm-2-0-for-java-8/59290927#59290927" class="bare">https://stackoverflow.com/questions/28874150/buildroot-with-jamvm-2-0-for-java-8/59290927#59290927</a> partly because their build system is shit like the rest of the project&#8217;s setup.</p>
</div>
<div class="paragraph">
<p>Unmerged patch at: <a href="http://lists.busybox.net/pipermail/buildroot/2018-February/213282.html" class="bare">http://lists.busybox.net/pipermail/buildroot/2018-February/213282.html</a></p>
</div>
<div class="paragraph">
<p>There is a JamVM package though <a href="https://en.wikipedia.org/wiki/JamVM" class="bare">https://en.wikipedia.org/wiki/JamVM</a> which is something Android started before moving to Dalvik,</p>
</div>
<div class="paragraph">
<p>Maybe some day other <a href="#android">Android</a> Java runtimes will also become compilable. Maybe, since Android is also shit.</p>
</div>
</div>
</div>
<div class="sect2">
<h3 id="algorithms"><a class="anchor" href="#algorithms"></a><a class="link" href="#algorithms">21.7. Algorithms</a></h3>
@@ -28793,12 +28992,15 @@ AArch64, see Procedure Call Standard for the ARM 64-bit Architecture.</p>
<div class="sect4">
<h5 id="arm-lse"><a class="anchor" href="#arm-lse"></a><a class="link" href="#arm-lse">24.7.1.1. ARM Large System Extensions (LSE)</a></h5>
<div class="paragraph">
<p>Parent section: <a href="#arm-multicore">ARM multicore</a>.</p>
</div>
<div class="paragraph">
<p><a href="#armarm8-db">ARMv8 architecture reference manual db</a> "ARMv8.1-LSE, ARMv8.1 Large System Extensions"</p>
</div>
<div class="ulist">
<ul>
<li>
<p>LDADD: <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/cpp/atomic/aarch64_ldadd.cpp">userland/cpp/atomic/aarch64_ldadd.cpp</a>, see also: <a href="#atomic-cpp">atomic.cpp</a>.</p>
<p>LDADD: <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/cpp/atomic/aarch64_ldadd.cpp">userland/cpp/atomic/aarch64_ldadd.cpp</a>, see also: <a href="#atomic-cpp">atomic.cpp</a>. Kernel inspiration: <a href="https://github.com/torvalds/linux/blob/v5.4/arch/arm64/include/asm/atomic_lse.h#L56" class="bare">https://github.com/torvalds/linux/blob/v5.4/arch/arm64/include/asm/atomic_lse.h#L56</a></p>
</li>
</ul>
</div>
@@ -30279,7 +30481,7 @@ IN: main
<p>and power consumption is key in ARM applications.</p>
</div>
<div class="paragraph">
<p>SEV is not the only thing that can wake up a WFE, it is only an explicit software way to do it. Notably, global monitor operations on memory accesses of regions marked by LDREX and STREX instructions can also wake up a WFE sleeping core. This is done to allow spinlocks opens to automatically wake up WFE sleeping cores at free time without the need for a explicit SEV.</p>
<p>SEV is not the only thing that can wake up a WFE, it is only an explicit software way to do it. Notably, global monitor operations on memory accesses of regions marked by LDAXR and STLXR instructions can also wake up a WFE sleeping core. This is done to allow spinlocks opens to automatically wake up WFE sleeping cores at free time without the need for a explicit SEV.</p>
</div>
<div class="paragraph">
<p>WFE and SEV are usable from userland, and are part of a efficient spinlock implementation.</p>
@@ -30318,7 +30520,7 @@ IN: main
</blockquote>
</div>
<div class="paragraph">
<p>The recommended ARMv8 spinlock implementation is shown at <a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/ch01s03s02.html" class="bare">http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/ch01s03s02.html</a> where <code>WAIT_FOR_UPDATE</code> is as explained in that section a macro that expands to WFE.</p>
<p>The recommended ARMv8 spinlock implementation is shown at <a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/ch01s03s02.html" class="bare">http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dht0008a/ch01s03s02.html</a> where <code>WAIT_FOR_UPDATE</code> is as explained in that section a macro that expands to WFE. TODO SEV is used explicitly in those examples via SIGNAL_UPDATE, where is the example that shows how SEV can be eliminated due to implicit monitor signals?</p>
</div>
<div class="paragraph">
<p>In QEMU 3.0.0, SEV is a NOPs, and WFE might be, but I&#8217;m not sure, see: <a href="https://github.com/qemu/qemu/blob/v3.0.0/target/arm/translate-a64.c#L1423" class="bare">https://github.com/qemu/qemu/blob/v3.0.0/target/arm/translate-a64.c#L1423</a></p>
@@ -30372,9 +30574,31 @@ IN: main
</li>
</ul>
</div>
<div class="paragraph">
<p>The best article to understand spinlocks is: <a href="https://eli.thegreenplace.net/2018/basics-of-futexes/" class="bare">https://eli.thegreenplace.net/2018/basics-of-futexes/</a></p>
</div>
</div>
<div class="sect4">
<h5 id="arm-psci"><a class="anchor" href="#arm-psci"></a><a class="link" href="#arm-psci">27.8.3.2. ARM PSCI</a></h5>
<h5 id="arm-ldaxr-and-stlxr-instructions"><a class="anchor" href="#arm-ldaxr-and-stlxr-instructions"></a><a class="link" href="#arm-ldaxr-and-stlxr-instructions">27.8.3.2. ARM LDAXR and STLXR instructions</a></h5>
<div class="paragraph">
<p>Can be used to implement atomic variables, see also:</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="#atomic-cpp">atomic.cpp</a></p>
</li>
<li>
<p><a href="https://stackoverflow.com/questions/56810/how-do-i-start-threads-in-plain-c/52453291#52453291" class="bare">https://stackoverflow.com/questions/56810/how-do-i-start-threads-in-plain-c/52453291#52453291</a></p>
</li>
</ul>
</div>
<div class="paragraph">
<p>The ARMv7 analogues are LDREX and STREX.</p>
</div>
</div>
<div class="sect4">
<h5 id="arm-psci"><a class="anchor" href="#arm-psci"></a><a class="link" href="#arm-psci">27.8.3.3. ARM PSCI</a></h5>
<div class="paragraph">
<p>In QEMU, CPU 1 starts in a halted state. This can be observed from GDB, where:</p>
</div>
@@ -30424,7 +30648,7 @@ IN: main
</div>
</div>
<div class="sect4">
<h5 id="arm-dmb-instruction"><a class="anchor" href="#arm-dmb-instruction"></a><a class="link" href="#arm-dmb-instruction">27.8.3.3. ARM DMB instruction</a></h5>
<h5 id="arm-dmb-instruction"><a class="anchor" href="#arm-dmb-instruction"></a><a class="link" href="#arm-dmb-instruction">27.8.3.4. ARM DMB instruction</a></h5>
<div class="paragraph">
<p>TODO: create and study a minimal examples in gem5 where the DMB instruction leads to less cycles: <a href="https://stackoverflow.com/questions/15491751/real-life-use-cases-of-barriers-dsb-dmb-isb-in-arm" class="bare">https://stackoverflow.com/questions/15491751/real-life-use-cases-of-barriers-dsb-dmb-isb-in-arm</a></p>
</div>
@@ -30974,7 +31198,7 @@ ISB</pre>
<h2 id="android"><a class="anchor" href="#android"></a><a class="link" href="#android">28. Android</a></h2>
<div class="sectionbody">
<div class="paragraph">
<p>Remember: Android AOSP is a huge undocumented piece of bloatware. It&#8217;s integration into this repo will likely never be super good.</p>
<p>Remember: Android AOSP is a huge undocumented piece of bloatware. It&#8217;s integration into this repo will likely never be super good. See also: <a href="https://cirosantilli.com#android" class="bare">https://cirosantilli.com#android</a></p>
</div>
<div class="paragraph">
<p>Verbose setup description: <a href="https://stackoverflow.com/questions/1809774/how-to-compile-the-android-aosp-kernel-and-test-it-with-the-android-emulator/48310014#48310014" class="bare">https://stackoverflow.com/questions/1809774/how-to-compile-the-android-aosp-kernel-and-test-it-with-the-android-emulator/48310014#48310014</a></p>
@@ -34826,6 +35050,9 @@ git push --follow-tags
<li>
<p><a href="https://github.com/MichielDerhaeg/build-linux" class="bare">https://github.com/MichielDerhaeg/build-linux</a> untested. Manually builds musl and BusyBox, no Buildroot. Seems to use host packaged toolchain and tested on x86_64 only. Might contain a minimized kernel config.</p>
</li>
<li>
<p><a href="https://eli.thegreenplace.net" class="bare">https://eli.thegreenplace.net</a> and the accompanying code: <a href="https://github.com/eliben/code-for-blog" class="bare">https://github.com/eliben/code-for-blog</a></p>
</li>
</ul>
</div>
<div class="paragraph">