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arm: signed LDR example with LDRSW
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@@ -14696,6 +14696,10 @@ There are LDR variants that load less than full 4 bytes:
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* link:userland/arch/arm/ldrb.S[]: load byte
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* link:userland/arch/arm/ldrb.S[]: load byte
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* link:userland/arch/arm/ldrh.S[]: load half word
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* link:userland/arch/arm/ldrh.S[]: load half word
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These also have signed and unsigned versions to either zero or one extend the result:
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* link:userland/arch/aarch64/ldrsw.S[]: load byte and sign extend
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==== ARM STR instruction
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==== ARM STR instruction
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Store from memory into registers.
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Store from memory into registers.
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30
userland/arch/aarch64/ldrsw.S
Normal file
30
userland/arch/aarch64/ldrsw.S
Normal file
@@ -0,0 +1,30 @@
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/* https://cirosantilli.com/linux-kernel-module-cheat#arm-ldrh-and-ldrb-instructions */
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#include <lkmc.h>
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LKMC_PROLOGUE
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ldr x19, =zero_extend
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mov x0, 0x0
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ldr w0, [x19]
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LKMC_ASSERT_EQ(x0, =0x0000000012345678)
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mov x0, 0x0
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ldrsw x0, [x19]
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LKMC_ASSERT_EQ(x0, =0x0000000012345678)
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ldr x19, =one_extend
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mov x0, 0x0
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ldr w0, [x19]
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LKMC_ASSERT_EQ(x0, =0x0000000082345678)
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mov x0, 0x0
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ldrsw x0, [x19]
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LKMC_ASSERT_EQ(x0, =0xFFFFFFFF82345678)
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LKMC_EPILOGUE
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zero_extend:
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.word 0x12345678
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one_extend:
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.word 0x82345678
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