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https://github.com/cirosantilli/linux-kernel-module-cheat.git
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gem5: add m5 fail 1 to /m5op.out
Document that m5 fail is not actually exiting status 1 on fs.py.
This commit is contained in:
44
README.adoc
44
README.adoc
@@ -8221,16 +8221,36 @@ It is possible to guess what most tools do from the corresponding <<m5ops>>, but
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===== m5 exit
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Quit gem5 with exit status 0.
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End the simulation.
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Sane Python scripts will exit gem5 with status 0, which is what `fs.py` does.
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===== m5 fail
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Quit gem5 with the given exit status.
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End the simulation with a failure exit event:
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....
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m5 fail 1
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....
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Sane Python scripts would use that as the exit status of gem5, which would be useful for testing purposes, but `fs.py` at 200281b08ca21f0d2678e23063f088960d3c0819 just prints an error message:
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....
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Simulated exit code not 0! Exit code is 1
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....
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and exits with status 0.
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TODO: it used to exit non 0, be like that, but it actually got changed to just print the message. Why? https://gem5-review.googlesource.com/c/public/gem5/+/4880
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`m5 fail` is just a superset of `m5 exit`, which is just:
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....
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m5 fail 0
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....
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as can be seen from the source: https://github.com/gem5/gem5/blob/50a57c0376c02c912a978c4443dd58caebe0f173/src/sim/pseudo_inst.cc#L303
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===== m5 writefile
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Send a guest file to the host. <<9p>> is a more advanced alternative.
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@@ -8294,10 +8314,13 @@ The executable `/m5ops.out` illustrates how to hard code with inline assembly th
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....
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# checkpoint
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/m5ops.out c
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# dumpstats
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/m5ops.out d
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# dump exit
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# exit
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/m5ops.out e
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# dump resetstats
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/m5ops.out r
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....
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@@ -8359,7 +8382,20 @@ Finally, `m5.c` calls the defined functions as in:
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m5_exit(ints[0]);
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....
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Therefore, the runtime "argument" that gets passed to the instruction, e.g. the desired exit status in the case of `exit`, gets passed directly through the link:https://en.wikipedia.org/wiki/Calling_convention#ARM_(A64)[aarch64 calling convention].
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Therefore, the runtime "argument" that gets passed to the instruction, e.g. the delay in ticks until the exit for `m5 exit`, gets passed directly through the link:https://en.wikipedia.org/wiki/Calling_convention#ARM_(A64)[aarch64 calling convention].
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Keep in mind that for all archs, `m5.c` does the calls with 64-bit integers:
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....
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uint64_t ints[2] = {0,0};
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parse_int_args(argc, argv, ints, argc);
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m5_fail(ints[1], ints[0]);
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....
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Therefore, for example:
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* aarch64 uses `x0` for the first argument and `x1` for the second, since each is 64 bits log already
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* arm uses `r0` and `r1` for the first argument, and `r2` and `r3` for the second, since each register is only 32 bits long
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That convention specifies that `x0` to `x7` contain the function arguments, so `x0` contains the first argument, and `x1` the second.
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@@ -6,36 +6,44 @@
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#define ENABLED 1
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#if defined(__arm__)
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static void m5_checkpoint()
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static void m5_checkpoint(void)
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{
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; .inst 0xEE000110 | (0x43 << 16);");
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; mov r2, #0; mov r3, #0; .inst 0xEE000110 | (0x43 << 16);");
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};
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static void m5_dump_stats()
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static void m5_dump_stats(void)
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{
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; .inst 0xEE000110 | (0x41 << 16);");
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; mov r2, #0; mov r3, #0; .inst 0xEE000110 | (0x41 << 16);");
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};
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static void m5_exit()
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{
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__asm__ __volatile__ ("mov r0, #0; .inst 0xEE000110 | (0x21 << 16);");
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};
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static void m5_reset_stats()
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static void m5_fail_1(void)
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{
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; .inst 0xEE000110 | (0x40 << 16);");
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; mov r2, #1; mov r3, #0; .inst 0xEE000110 | (0x22 << 16);");
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};
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static void m5_reset_stats(void)
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{
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__asm__ __volatile__ ("mov r0, #0; mov r1, #0; mov r2, #0; mov r3, #0; .inst 0xEE000110 | (0x40 << 16);");
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};
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#elif defined(__aarch64__)
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static void m5_checkpoint()
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static void m5_checkpoint(void)
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{
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__asm__ __volatile__ ("mov x0, #0; mov x1, #0; .inst 0xFF000110 | (0x43 << 16);");
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};
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static void m5_dump_stats()
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static void m5_dump_stats(void)
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{
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__asm__ __volatile__ ("mov x0, #0; mov x1, #0; .inst 0xFF000110 | (0x41 << 16);");
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};
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static void m5_exit()
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static void m5_exit(void)
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{
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__asm__ __volatile__ ("mov x0, #0; .inst 0XFF000110 | (0x21 << 16);");
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};
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static void m5_reset_stats()
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static void m5_fail_1(void)
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{
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__asm__ __volatile__ ("mov x0, #0; mov x1, #1; .inst 0xFF000110 | (0x22 << 16);");
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};
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static void m5_reset_stats(void)
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{
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__asm__ __volatile__ ("mov x0, #0; mov x1, #0; .inst 0XFF000110 | (0x40 << 16);");
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};
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@@ -62,14 +70,17 @@ void
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switch (action)
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{
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case 'c':
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m5_checkpoint(0, 0);
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m5_checkpoint();
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break;
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case 'd':
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m5_dump_stats(0, 0);
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m5_dump_stats();
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break;
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case 'e':
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m5_exit();
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break;
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case 'f':
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m5_fail_1();
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break;
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case 'r':
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m5_reset_stats();
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break;
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