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https://github.com/cirosantilli/linux-kernel-module-cheat.git
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baremetal: working aarch64 svc example adapted from takeharukato
Not yet generalized for usage on multiple files.
This commit is contained in:
Ciro Santilli 六四事件 法轮功
17
README.adoc
17
README.adoc
@@ -8967,7 +8967,13 @@ less "$(./getvar --arch aarch64 run_dir)/trace.txt"
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Output the trace to stdout instead of a file:
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....
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./run --arch aarch64 --eval 'm5 exit' --emulator gem5 --trace Exec --trace-stdout
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./run \
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--arch aarch64 \
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--emulator gem5 \
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--eval 'm5 exit' \
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--trace Exec \
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--trace-stdout \
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;
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....
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This would produce a lot of output however, so you will likely not want that when tracing a Linux kernel boot instructions. But it can be very convenient for smaller traces.
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@@ -11201,6 +11207,14 @@ output:
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Setup a handler for `svc`, do an `svc`, and observe that the handler got called and returned:
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....
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./run --arch aarch64 --baremetal arch/aarch64/svc_asm
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....
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Source: link:baremetal/arch/aarch64/svc_asm.S[]
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TODO: factor out the above, and make it also work on C:
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....
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./run --arch aarch64 --baremetal arch/aarch64/svc
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....
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@@ -11261,6 +11275,7 @@ This reset value is defined `UNKNOWN` by <<armarm8>> D10.2.116 "VBAR_EL1, Vector
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Bibliography:
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* https://github.com/torvalds/linux/blob/v4.20/arch/arm64/kernel/entry.S#L430 this is where the kernel defines the vector table
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* https://github.com/dwelch67/qemu_arm_samples/tree/07162ba087111e0df3f44fd857d1b4e82458a56d/swi01
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* https://github.com/NienfengYao/armv8-bare-metal/blob/572c6f95880e70aa92fe9fed4b8ad7697082a764/vector.S#L168
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* https://stackoverflow.com/questions/51094092/how-to-make-timer-irq-work-on-qemu-machine-virt-cpu-cortex-a57
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@@ -1,6 +1,7 @@
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/* Test that we can move:
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* - set registers
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* - read x30 */
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* - read x30
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*/
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.global main
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main:
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mov x0, #1
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@@ -23,6 +24,6 @@ main:
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fmov d31, #2.5
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/* test-gdb-d31 */
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/* Exit required since we meesed up with x30 which is the lr. */
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/* Exit required since we messed up with x30 which is the lr. */
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mov x0, #0
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bl exit
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240
baremetal/arch/aarch64/svc_asm.S
Normal file
240
baremetal/arch/aarch64/svc_asm.S
Normal file
@@ -0,0 +1,240 @@
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/* TODO factor it out to make reusable. */
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.global main
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main:
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/* Load the vector table. */
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ldr x0, =vector_table
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msr vbar_el1, x0
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/* Do the svc. */
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svc 0
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/* Confirm that svc was called and modified myvar. */
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ldr x0, myvar
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ldr x1, mynewvar
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cmp x0, x1
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beq 1f
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bl common_assert_fail
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1:
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/* Go home. */
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ret
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common_trap_handler:
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/* Modify myvar as a visible side effect. */
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ldr x0, mynewvar
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ldr x1, =myvar
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str x0, [x1]
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ret
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myvar:
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.quad 0x0
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mynewvar:
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.quad 0x12346789ABCDEF0
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/* .h
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*
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* Adapted from: https://github.com/takeharukato/sample-tsk-sw/blob/ce7973aa5d46c9eedb58309de43df3b09d4f8d8d/hal/aarch64/vector.S
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*/
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#define AARCH64_EXC_SYNC_SP0 (0x1)
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#define AARCH64_EXC_IRQ_SP0 (0x2)
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#define AARCH64_EXC_FIQ_SP0 (0x3)
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#define AARCH64_EXC_SERR_SP0 (0x4)
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#define AARCH64_EXC_SYNC_SPX (0x11)
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#define AARCH64_EXC_IRQ_SPX (0x12)
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#define AARCH64_EXC_FIQ_SPX (0x13)
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#define AARCH64_EXC_SERR_SPX (0x14)
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#define AARCH64_EXC_SYNC_AARCH64 (0x21)
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#define AARCH64_EXC_IRQ_AARCH64 (0x22)
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#define AARCH64_EXC_FIQ_AARCH64 (0x23)
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#define AARCH64_EXC_SERR_AARCH64 (0x24)
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#define AARCH64_EXC_SYNC_AARCH32 (0x31)
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#define AARCH64_EXC_IRQ_AARCH32 (0x32)
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#define AARCH64_EXC_FIQ_AARCH32 (0x33)
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#define AARCH64_EXC_SERR_AARCH32 (0x34)
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#if !defined(__ASSEMBLER__)
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#include <stdint.h>
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typedef struct _exception_frame{
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uint64_t exc_type;
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uint64_t exc_esr;
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uint64_t exc_sp;
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uint64_t exc_elr;
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uint64_t exc_spsr;
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uint64_t x0;
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uint64_t x1;
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uint64_t x2;
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uint64_t x3;
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uint64_t x4;
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uint64_t x5;
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uint64_t x6;
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uint64_t x7;
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uint64_t x8;
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uint64_t x9;
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uint64_t x10;
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uint64_t x11;
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uint64_t x12;
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uint64_t x13;
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uint64_t x14;
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uint64_t x15;
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uint64_t x16;
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uint64_t x17;
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uint64_t x18;
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uint64_t x19;
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uint64_t x20;
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uint64_t x21;
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uint64_t x22;
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uint64_t x23;
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uint64_t x24;
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uint64_t x25;
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uint64_t x26;
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uint64_t x27;
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uint64_t x28;
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uint64_t x29;
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uint64_t x30;
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} exception_frame;
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void common_trap_handler(exception_frame *exception);
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#endif
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/* .S */
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#define EXC_FRAME_SIZE (288) /* sizeof(exception_frame) */
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#define EXC_EXC_TYPE_OFFSET (0) /* offsetof(exception_frame, exc_type) */
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#define EXC_EXC_ESR_OFFSET (8) /* offsetof(exception_frame, exc_esr) */
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#define EXC_EXC_SP_OFFSET (16) /* offsetof(exception_frame, exc_sp) */
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#define EXC_EXC_ELR_OFFSET (24) /* offsetof(exception_frame, exc_elr) */
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#define EXC_EXC_SPSR_OFFSET (32) /* offsetof(exception_frame, exc_spsr) */
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#define BUILD_TRAPFRAME(exc_type) \
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stp x29, x30, [sp, -16]!; \
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stp x27, x28, [sp, -16]!; \
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stp x25, x26, [sp, -16]!; \
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stp x23, x24, [sp, -16]!; \
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stp x21, x22, [sp, -16]!; \
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stp x19, x20, [sp, -16]!; \
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stp x17, x18, [sp, -16]!; \
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stp x15, x16, [sp, -16]!; \
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stp x13, x14, [sp, -16]!; \
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stp x11, x12, [sp, -16]!; \
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stp x9, x10, [sp, -16]!; \
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stp x7, x8, [sp, -16]!; \
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stp x5, x6, [sp, -16]!; \
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stp x3, x4, [sp, -16]!; \
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stp x1, x2, [sp, -16]!; \
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mrs x21, spsr_el1; \
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stp x21, x0, [sp, -16]!; \
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mrs x21, elr_el1; \
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stp xzr, x21, [sp, -16]!; \
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mov x21, (exc_type); \
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mrs x22, esr_el1; \
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stp x21, x22, [sp, -16]!
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#define STORE_TRAPED_SP \
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mrs x21, sp_el0; \
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str x21, [sp, EXC_EXC_SP_OFFSET]
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#define CALL_COMMON_TRAP_HANDLER \
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mov x0, sp; \
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bl common_trap_handler
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#define STORE_NESTED_SP \
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mov x21, sp; \
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add x21, x21, EXC_FRAME_SIZE; \
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str x21, [sp, EXC_EXC_SP_OFFSET]
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#define RESTORE_TRAPED_SP \
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ldr x21, [sp, EXC_EXC_SP_OFFSET]; \
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msr sp_el0, x21
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#define RESTORE_TRAPFRAME \
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add sp, sp, 16; \
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ldp x21, x22, [sp], 16; \
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msr elr_el1, x22; \
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ldp x21, x0, [sp], 16; \
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msr spsr_el1, x21; \
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ldp x1, x2, [sp], 16; \
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ldp x3, x4, [sp], 16; \
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ldp x5, x6, [sp], 16; \
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ldp x7, x8, [sp], 16; \
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ldp x9, x10, [sp], 16; \
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ldp x11, x12, [sp], 16; \
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ldp x13, x14, [sp], 16; \
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ldp x15, x16, [sp], 16; \
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ldp x17, x18, [sp], 16; \
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ldp x19, x20, [sp], 16; \
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ldp x21, x22, [sp], 16; \
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ldp x23, x24, [sp], 16; \
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ldp x25, x26, [sp], 16; \
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ldp x27, x28, [sp], 16; \
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ldp x29, x30, [sp], 16; \
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eret
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#define VECTOR_ENTRY(func_name) \
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.align 7; \
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b func_name
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#define VECTOR_FUNC_ALIGN .align 2
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#define VECTOR_FUNC(func_name, func_id) \
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VECTOR_FUNC_ALIGN; \
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func_name:; \
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BUILD_TRAPFRAME(func_id); \
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STORE_TRAPED_SP; \
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CALL_COMMON_TRAP_HANDLER; \
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RESTORE_TRAPED_SP; \
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RESTORE_TRAPFRAME
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#define VECTOR_FUNC_NESTED(func_name, func_id) \
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VECTOR_FUNC_ALIGN; \
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func_name:; \
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BUILD_TRAPFRAME(func_id); \
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STORE_NESTED_SP; \
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CALL_COMMON_TRAP_HANDLER; \
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RESTORE_TRAPFRAME
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.align 11
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.global vector_table
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vector_table:
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VECTOR_ENTRY(_curr_el_sp0_sync)
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VECTOR_ENTRY(_curr_el_sp0_irq)
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VECTOR_ENTRY(_curr_el_sp0_fiq)
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VECTOR_ENTRY(_curr_el_sp0_serror)
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VECTOR_ENTRY(_curr_el_spx_sync)
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VECTOR_ENTRY(_curr_el_spx_irq)
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VECTOR_ENTRY(_curr_el_spx_fiq)
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VECTOR_ENTRY(_curr_el_spx_serror)
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VECTOR_ENTRY(_lower_el_aarch64_sync)
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VECTOR_ENTRY(_lower_el_aarch64_irq)
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VECTOR_ENTRY(_lower_el_aarch64_fiq)
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VECTOR_ENTRY(_lower_el_aarch64_serror)
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VECTOR_ENTRY(_lower_el_aarch32_sync)
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VECTOR_ENTRY(_lower_el_aarch32_irq)
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VECTOR_ENTRY(_lower_el_aarch32_fiq)
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VECTOR_ENTRY(_lower_el_aarch32_serror)
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VECTOR_FUNC(_curr_el_sp0_sync, AARCH64_EXC_SYNC_SP0)
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VECTOR_FUNC(_curr_el_sp0_irq, AARCH64_EXC_IRQ_SP0)
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VECTOR_FUNC(_curr_el_sp0_fiq, AARCH64_EXC_FIQ_SP0)
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VECTOR_FUNC(_curr_el_sp0_serror, AARCH64_EXC_SERR_SP0)
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VECTOR_FUNC_NESTED(_curr_el_spx_sync, AARCH64_EXC_SYNC_SPX)
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VECTOR_FUNC_NESTED(_curr_el_spx_irq, AARCH64_EXC_IRQ_SPX)
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VECTOR_FUNC_NESTED(_curr_el_spx_fiq, AARCH64_EXC_FIQ_SPX)
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VECTOR_FUNC_NESTED(_curr_el_spx_serror, AARCH64_EXC_SERR_SPX)
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VECTOR_FUNC(_lower_el_aarch64_sync, AARCH64_EXC_SYNC_AARCH64)
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VECTOR_FUNC(_lower_el_aarch64_irq, AARCH64_EXC_IRQ_AARCH64)
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VECTOR_FUNC(_lower_el_aarch64_fiq, AARCH64_EXC_FIQ_AARCH64)
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VECTOR_FUNC(_lower_el_aarch64_serror, AARCH64_EXC_SERR_AARCH64)
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VECTOR_FUNC(_lower_el_aarch32_sync, AARCH64_EXC_SYNC_AARCH32)
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VECTOR_FUNC(_lower_el_aarch32_irq, AARCH64_EXC_IRQ_AARCH32)
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VECTOR_FUNC(_lower_el_aarch32_fiq, AARCH64_EXC_FIQ_AARCH32)
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VECTOR_FUNC(_lower_el_aarch32_serror, AARCH64_EXC_SERR_AARCH32)
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