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Ciro Santilli 六四事件 法轮功
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@@ -1808,68 +1808,70 @@ body.book #toc,body.book #preamble,body.book h1.sect0,body.book .sect1>h2{page-b
<ul class="sectlevel2">
<li><a href="#baremetal-gdb-step-debug">27.1. Baremetal GDB step debug</a></li>
<li><a href="#baremetal-bootloaders">27.2. Baremetal bootloaders</a></li>
<li><a href="#semihosting">27.3. Semihosting</a>
<li><a href="#baremetal-linker-script">27.3. Baremetal linker script</a></li>
<li><a href="#baremetal-command-line-arguments">27.4. Baremetal command line arguments</a></li>
<li><a href="#semihosting">27.5. Semihosting</a>
<ul class="sectlevel3">
<li><a href="#gem5-semihosting">27.3.1. gem5 semihosting</a></li>
<li><a href="#gem5-semihosting">27.5.1. gem5 semihosting</a></li>
</ul>
</li>
<li><a href="#gem5-baremetal-carriage-return">27.4. gem5 baremetal carriage return</a></li>
<li><a href="#baremetal-host-packaged-toolchain">27.5. Baremetal host packaged toolchain</a></li>
<li><a href="#baremetal-cpp">27.6. Baremetal C++</a></li>
<li><a href="#gdb-builtin-cpu-simulator">27.7. GDB builtin CPU simulator</a>
<li><a href="#gem5-baremetal-carriage-return">27.6. gem5 baremetal carriage return</a></li>
<li><a href="#baremetal-host-packaged-toolchain">27.7. Baremetal host packaged toolchain</a></li>
<li><a href="#baremetal-cpp">27.8. Baremetal C++</a></li>
<li><a href="#gdb-builtin-cpu-simulator">27.9. GDB builtin CPU simulator</a>
<ul class="sectlevel3">
<li><a href="#gdb-builtin-cpu-simulator-userland">27.7.1. GDB builtin CPU simulator userland</a></li>
<li><a href="#gdb-builtin-cpu-simulator-userland">27.9.1. GDB builtin CPU simulator userland</a></li>
</ul>
</li>
<li><a href="#arm-baremetal">27.8. ARM baremetal</a>
<li><a href="#arm-baremetal">27.10. ARM baremetal</a>
<ul class="sectlevel3">
<li><a href="#arm-exception-levels">27.8.1. ARM exception levels</a>
<li><a href="#arm-exception-levels">27.10.1. ARM exception levels</a>
<ul class="sectlevel4">
<li><a href="#arm-change-exception-level">27.8.1.1. ARM change exception level</a></li>
<li><a href="#arm-sp0-vs-spx">27.8.1.2. ARM SP0 vs SPx</a></li>
<li><a href="#arm-change-exception-level">27.10.1.1. ARM change exception level</a></li>
<li><a href="#arm-sp0-vs-spx">27.10.1.2. ARM SP0 vs SPx</a></li>
</ul>
</li>
<li><a href="#arm-svc-instruction">27.8.2. ARM SVC instruction</a>
<li><a href="#arm-svc-instruction">27.10.2. ARM SVC instruction</a>
<ul class="sectlevel4">
<li><a href="#armv8-exception-vector-table-format">27.8.2.1. ARMv8 exception vector table format</a></li>
<li><a href="#arm-esr-register">27.8.2.2. ARM ESR register</a></li>
<li><a href="#arm-elr-register">27.8.2.3. ARM ELR register</a></li>
<li><a href="#armv8-exception-vector-table-format">27.10.2.1. ARMv8 exception vector table format</a></li>
<li><a href="#arm-esr-register">27.10.2.2. ARM ESR register</a></li>
<li><a href="#arm-elr-register">27.10.2.3. ARM ELR register</a></li>
</ul>
</li>
<li><a href="#arm-baremetal-multicore">27.8.3. ARM baremetal multicore</a>
<li><a href="#arm-baremetal-multicore">27.10.3. ARM baremetal multicore</a>
<ul class="sectlevel4">
<li><a href="#arm-wfe-and-sev-instructions">27.8.3.1. ARM WFE and SEV instructions</a>
<li><a href="#arm-wfe-and-sev-instructions">27.10.3.1. ARM WFE and SEV instructions</a>
<ul class="sectlevel5">
<li><a href="#arm-wfe-global-monitor-events">27.8.3.1.1. ARM WFE global monitor events</a></li>
<li><a href="#wfe-from-userland">27.8.3.1.2. WFE from userland</a></li>
<li><a href="#armv8-spinlock-pattern">27.8.3.1.3. ARMv8 spinlock pattern</a></li>
<li><a href="#gem5-arm-wfe">27.8.3.1.4. gem5 ARM WFE</a></li>
<li><a href="#arm-yield-instruction">27.8.3.1.5. ARM YIELD instruction</a></li>
<li><a href="#arm-wfe-global-monitor-events">27.10.3.1.1. ARM WFE global monitor events</a></li>
<li><a href="#wfe-from-userland">27.10.3.1.2. WFE from userland</a></li>
<li><a href="#armv8-spinlock-pattern">27.10.3.1.3. ARMv8 spinlock pattern</a></li>
<li><a href="#gem5-arm-wfe">27.10.3.1.4. gem5 ARM WFE</a></li>
<li><a href="#arm-yield-instruction">27.10.3.1.5. ARM YIELD instruction</a></li>
</ul>
</li>
<li><a href="#arm-ldaxr-and-stlxr-instructions">27.8.3.2. ARM LDAXR and STLXR instructions</a></li>
<li><a href="#arm-psci">27.8.3.3. ARM PSCI</a></li>
<li><a href="#arm-dmb-instruction">27.8.3.4. ARM DMB instruction</a></li>
<li><a href="#arm-ldaxr-and-stlxr-instructions">27.10.3.2. ARM LDAXR and STLXR instructions</a></li>
<li><a href="#arm-psci">27.10.3.3. ARM PSCI</a></li>
<li><a href="#arm-dmb-instruction">27.10.3.4. ARM DMB instruction</a></li>
</ul>
</li>
<li><a href="#arm-timer">27.8.4. ARM timer</a></li>
<li><a href="#arm-gic">27.8.5. ARM GIC</a></li>
<li><a href="#arm-paging">27.8.6. ARM paging</a></li>
<li><a href="#arm-baremetal-bibliography">27.8.7. ARM baremetal bibliography</a>
<li><a href="#arm-timer">27.10.4. ARM timer</a></li>
<li><a href="#arm-gic">27.10.5. ARM GIC</a></li>
<li><a href="#arm-paging">27.10.6. ARM paging</a></li>
<li><a href="#arm-baremetal-bibliography">27.10.7. ARM baremetal bibliography</a>
<ul class="sectlevel4">
<li><a href="#nienfengyaoarmv8-bare-metal">27.8.7.1. NienfengYao/armv8-bare-metal</a></li>
<li><a href="#tukl-msdgem5-bare-metal">27.8.7.2. tukl-msd/gem5.bare-metal</a></li>
<li><a href="#nienfengyaoarmv8-bare-metal">27.10.7.1. NienfengYao/armv8-bare-metal</a></li>
<li><a href="#tukl-msdgem5-bare-metal">27.10.7.2. tukl-msd/gem5.bare-metal</a></li>
</ul>
</li>
</ul>
</li>
<li><a href="#how-we-got-some-baremetal-stuff-to-work">27.9. How we got some baremetal stuff to work</a>
<li><a href="#how-we-got-some-baremetal-stuff-to-work">27.11. How we got some baremetal stuff to work</a>
<ul class="sectlevel3">
<li><a href="#find-the-uart-address">27.9.1. Find the UART address</a></li>
<li><a href="#aarch64-baremetal-neon-setup">27.9.2. aarch64 baremetal NEON setup</a></li>
<li><a href="#find-the-uart-address">27.11.1. Find the UART address</a></li>
<li><a href="#aarch64-baremetal-neon-setup">27.11.2. aarch64 baremetal NEON setup</a></li>
</ul>
</li>
<li><a href="#baremetal-tests">27.10. Baremetal tests</a></li>
<li><a href="#baremetal-tests">27.12. Baremetal tests</a></li>
</ul>
</li>
<li><a href="#android">28. Android</a>
@@ -3743,7 +3745,7 @@ cd userland
--qemu-which host \
--userland-build-id host \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;</pre>
</div>
</div>
@@ -3791,7 +3793,7 @@ cd userland
--qemu-which host \
--userland-build-id host \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;</pre>
</div>
</div>
@@ -4011,7 +4013,7 @@ error: simulation error detected by parsing logs</pre>
</div>
</div>
<div class="paragraph">
<p>TODO: the carriage returns are a bit different than in QEMU, see: <a href="#gem5-baremetal-carriage-return">Section 27.4, &#8220;gem5 baremetal carriage return&#8221;</a>.</p>
<p>TODO: the carriage returns are a bit different than in QEMU, see: <a href="#gem5-baremetal-carriage-return">Section 27.6, &#8220;gem5 baremetal carriage return&#8221;</a>.</p>
</div>
<div class="paragraph">
<p>Note that <code>./build-baremetal</code> requires the <code>--emulator gem5</code> option, and generates separate executable images for both, as can be seen from:</p>
@@ -5360,7 +5362,7 @@ Breakpoint 3 at 0xffffffff811615e3: fdget_pos. (9 locations)
<div class="sect2">
<h3 id="gdb-step-debug-multicore-userland"><a class="anchor" href="#gdb-step-debug-multicore-userland"></a><a class="link" href="#gdb-step-debug-multicore-userland">2.9. GDB step debug multicore userland</a></h3>
<div class="paragraph">
<p>For a more minimal baremetal multicore setup, see: <a href="#arm-baremetal-multicore">Section 27.8.3, &#8220;ARM baremetal multicore&#8221;</a>.</p>
<p>For a more minimal baremetal multicore setup, see: <a href="#arm-baremetal-multicore">Section 27.10.3, &#8220;ARM baremetal multicore&#8221;</a>.</p>
</div>
<div class="paragraph">
<p>We can set and get which cores the Linux kernel allows a program to run on with <code>sched_getaffinity</code> and <code>sched_setaffinity</code>:</p>
@@ -7442,7 +7444,7 @@ sudo ./setup -y</pre>
<pre>./build user-mode-qemu
./run \
--userland userland/c/command_line_arguments.c \
--userland-args='asdf "qw er"' \
--cli-args='asdf "qw er"' \
;</pre>
</div>
</div>
@@ -7481,7 +7483,7 @@ qw er</pre>
--arch aarch64 \
--gdb-wait \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;</pre>
</div>
</div>
@@ -7506,7 +7508,7 @@ qw er</pre>
--arch aarch64 \
--gdb \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;</pre>
</div>
</div>
@@ -7576,7 +7578,7 @@ qw er</pre>
<div class="content">
<pre>./run \
--userland "$(./getvar buildroot_target_dir)/bin/echo" \
--userland-args='asdf' \
--cli-args='asdf' \
;</pre>
</div>
</div>
@@ -7600,7 +7602,7 @@ qw er</pre>
<pre>./run \
--arch aarch64 \
--userland "$(./getvar --arch aarch64 buildroot_target_dir)/bin/sh" \
--userland-args='-c "uname -a &amp;&amp; pwd"' \
--cli-args='-c "uname -a &amp;&amp; pwd"' \
;</pre>
</div>
</div>
@@ -7727,7 +7729,7 @@ qemu: uncaught target signal 6 (Aborted) - core dumped</pre>
--arch aarch64 \
--static \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;</pre>
</div>
</div>
@@ -7931,7 +7933,7 @@ qemu-x86_64: /path/to/linux-kernel-module-cheat/submodules/qemu/accel/tcg/cpu-ex
--arch aarch64 \
--emulator gem5 \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;</pre>
</div>
</div>
@@ -7948,7 +7950,7 @@ qemu-x86_64: /path/to/linux-kernel-module-cheat/submodules/qemu/accel/tcg/cpu-ex
--emulator gem5 \
--gdb-wait \
--userland userland/c/command_line_arguments.c \
--userland-args 'asdf "qw er"' \
--cli-args 'asdf "qw er"' \
;
./run-gdb \
--arch aarch64 \
@@ -8053,7 +8055,7 @@ hello
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland userland/posix/count_to.c --userland-args 3</pre>
<pre>./run --userland userland/posix/count_to.c --cli-args 3</pre>
</div>
</div>
<div class="paragraph">
@@ -17712,7 +17714,7 @@ extern SimpleFlag ExecEnable;
<p><code>25007500</code>: time count in some unit. Note how the microops execute at further timestamps.</p>
</li>
<li>
<p><code>system.cpu</code>: distinguishes between CPUs when there are more than one. For example, running <a href="#arm-baremetal-multicore">Section 27.8.3, &#8220;ARM baremetal multicore&#8221;</a> with two cores produces <code>system.cpu0</code> and <code>system.cpu1</code></p>
<p><code>system.cpu</code>: distinguishes between CPUs when there are more than one. For example, running <a href="#arm-baremetal-multicore">Section 27.10.3, &#8220;ARM baremetal multicore&#8221;</a> with two cores produces <code>system.cpu0</code> and <code>system.cpu1</code></p>
</li>
<li>
<p><code>T0</code>: thread number. TODO: <a href="https://superuser.com/questions/133082/hyper-threading-and-dual-core-whats-the-difference/995858#995858">hyperthread</a>? How to play with it?</p>
@@ -18005,7 +18007,7 @@ root</pre>
<p>runs are deterministic by default, unlike QEMU which has a special <a href="#qemu-record-and-replay">QEMU record and replay</a> mode, that requires first playing the content once and then replaying</p>
</li>
<li>
<p>gem5 ARM at least appears to implement more low level CPU functionality than QEMU, e.g. QEMU only added EL2 in 2018: <a href="https://stackoverflow.com/questions/42824706/qemu-system-aarch64-entering-el1-when-emulating-a53-power-up" class="bare">https://stackoverflow.com/questions/42824706/qemu-system-aarch64-entering-el1-when-emulating-a53-power-up</a> See also: <a href="#arm-exception-levels">Section 27.8.1, &#8220;ARM exception levels&#8221;</a></p>
<p>gem5 ARM at least appears to implement more low level CPU functionality than QEMU, e.g. QEMU only added EL2 in 2018: <a href="https://stackoverflow.com/questions/42824706/qemu-system-aarch64-entering-el1-when-emulating-a53-power-up" class="bare">https://stackoverflow.com/questions/42824706/qemu-system-aarch64-entering-el1-when-emulating-a53-power-up</a> See also: <a href="#arm-exception-levels">Section 27.10.1, &#8220;ARM exception levels&#8221;</a></p>
</li>
<li>
<p>gem5 offers more advanced logging, even for non micro architectural things which QEMU models in some way, e.g. <a href="#qemu-trace-memory-accesses">QEMU trace memory accesses</a>, because QEMU&#8217;s binary translation optimizations reduce visibility</p>
@@ -18309,7 +18311,7 @@ getconf _NPROCESSORS_CONF</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland userland/posix/pthread_count.c --userland-args 4
<pre>./run --userland userland/posix/pthread_count.c --cli-args 4
ps Haux | grep qemu | wc</pre>
</div>
</div>
@@ -18333,7 +18335,7 @@ ps Haux | grep qemu | wc</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --cpus 1 --emulator gem5 --userland userland/posix/pthread_self.c --userland-args 1</pre>
<pre>./run --cpus 1 --emulator gem5 --userland userland/posix/pthread_self.c --cli-args 1</pre>
</div>
</div>
<div class="paragraph">
@@ -18349,7 +18351,7 @@ ps Haux | grep qemu | wc</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --cpus 2 --emulator gem5 --userland userland/posix/pthread_self.c --userland-args 1</pre>
<pre>./run --cpus 2 --emulator gem5 --userland userland/posix/pthread_self.c --cli-args 1</pre>
</div>
</div>
<div class="paragraph">
@@ -18357,7 +18359,7 @@ ps Haux | grep qemu | wc</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --cpus 2 --emulator gem5 --userland userland/posix/pthread_self.c --userland-args '1 2'</pre>
<pre>./run --cpus 2 --emulator gem5 --userland userland/posix/pthread_self.c --cli-args '1 2'</pre>
</div>
</div>
<div class="paragraph">
@@ -18947,14 +18949,14 @@ m5 checkpoint</pre>
<div class="sect3">
<h4 id="gem5-checkpoint-userland-minimal-example"><a class="anchor" href="#gem5-checkpoint-userland-minimal-example"></a><a class="link" href="#gem5-checkpoint-userland-minimal-example">19.5.1. gem5 checkpoint userland minimal example</a></h4>
<div class="paragraph">
<p>In order to debug checkpoint restore bugs, this minimal setup using <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/gem5_checkpoint_restore.S">userland/freestanding/gem5_checkpoint_restore.S</a> can be handy:</p>
<p>In order to debug checkpoint restore bugs, this minimal setup using <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/gem5_checkpoint.S">userland/freestanding/gem5_checkpoint.S</a> can be handy:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./build-userland --arch aarch64 --static
./run --arch aarch64 --emulator gem5 --static --userland userland/freestanding/gem5_checkpoint_restore.S --trace-insts-stdout
./run --arch aarch64 --emulator gem5 --static --userland userland/freestanding/gem5_checkpoint_restore.S --trace-insts-stdout --gem5-restore 1
./run --arch aarch64 --emulator gem5 --static --userland userland/freestanding/gem5_checkpoint_restore.S --trace-insts-stdout --gem5-restore 1 -- --cpu-type=DerivO3CPU --restore-with-cpu=DerivO3CPU --caches</pre>
./run --arch aarch64 --emulator gem5 --static --userland userland/freestanding/gem5_checkpoint.S --trace-insts-stdout
./run --arch aarch64 --emulator gem5 --static --userland userland/freestanding/gem5_checkpoint.S --trace-insts-stdout --gem5-restore 1
./run --arch aarch64 --emulator gem5 --static --userland userland/freestanding/gem5_checkpoint.S --trace-insts-stdout --gem5-restore 1 -- --cpu-type=DerivO3CPU --restore-with-cpu=DerivO3CPU --caches</pre>
</div>
</div>
<div class="paragraph">
@@ -19209,7 +19211,7 @@ m5 exit</pre>
<p>And now you will notice that everything happens much slower in the guest terminal!</p>
</div>
<div class="paragraph">
<p>One even more direct and minimal way to observe this is with <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/gem5_checkpoint_restore.S">userland/freestanding/gem5_checkpoint_restore.S</a> which was mentioned at <a href="#gem5-checkpoint-userland-minimal-example">gem5 checkpoint userland minimal example</a> plus some logging:</p>
<p>One even more direct and minimal way to observe this is with <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/gem5_checkpoint.S">userland/freestanding/gem5_checkpoint.S</a> which was mentioned at <a href="#gem5-checkpoint-userland-minimal-example">gem5 checkpoint userland minimal example</a> plus some logging:</p>
</div>
<div class="literalblock">
<div class="content">
@@ -19218,7 +19220,7 @@ m5 exit</pre>
--emulator gem5 \
--static \
--trace ExecAll,FmtFlag,O3CPU,SimpleCPU \
--userland userland/freestanding/gem5_checkpoint_restore.S \
--userland userland/freestanding/gem5_checkpoint.S \
;
cat "$(./getvar --arch aarch64 --emulator gem5 trace_txt_file)"
./run \
@@ -19227,7 +19229,7 @@ cat "$(./getvar --arch aarch64 --emulator gem5 trace_txt_file)"
--gem5-restore 1 \
--static \
--trace ExecAll,FmtFlag,O3CPU,SimpleCPU \
--userland userland/freestanding/gem5_checkpoint_restore.S \
--userland userland/freestanding/gem5_checkpoint.S \
-- \
--caches \
--cpu-type DerivO3CPU \
@@ -19303,7 +19305,7 @@ cat "$(./getvar --arch aarch64 --emulator gem5 trace_txt_file)"</pre>
</ul>
</div>
<div class="paragraph">
<p>But let&#8217;s give it a try anyways with <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/gem5_checkpoint_restore.S">userland/freestanding/gem5_checkpoint_restore.S</a> which was mentioned at <a href="#gem5-checkpoint-userland-minimal-example">gem5 checkpoint userland minimal example</a></p>
<p>But let&#8217;s give it a try anyways with <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/gem5_checkpoint.S">userland/freestanding/gem5_checkpoint.S</a> which was mentioned at <a href="#gem5-checkpoint-userland-minimal-example">gem5 checkpoint userland minimal example</a></p>
</div>
<div class="literalblock">
<div class="content">
@@ -19312,7 +19314,7 @@ cat "$(./getvar --arch aarch64 --emulator gem5 trace_txt_file)"</pre>
--emulator gem5 \
--static \
--trace ExecAll,FmtFlag,O3CPU,SimpleCPU \
--userland userland/freestanding/gem5_checkpoint_restore.S \
--userland userland/freestanding/gem5_checkpoint.S \
-- \
--caches
--cpu-type DerivO3CPU \
@@ -19532,7 +19534,7 @@ FullO3CPU: Ticking main, FullO3CPU.
</div>
<div class="literalblock">
<div class="content">
<pre>./run --arch aarch64 --emulator gem5 --userland "$(./getvar --arch aarch64 out_rootfs_overlay_bin_dir)/m5" --userland-args dumpstats</pre>
<pre>./run --arch aarch64 --emulator gem5 --userland "$(./getvar --arch aarch64 out_rootfs_overlay_bin_dir)/m5" --cli-args dumpstats</pre>
</div>
</div>
<div class="paragraph">
@@ -20257,7 +20259,7 @@ system.cpu.dtb.inst_hits</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --arch aarch64 --emulator gem5 --userland userland/c/m5ops.c --userland-args 'd 1000'</pre>
<pre>./run --arch aarch64 --emulator gem5 --userland userland/c/m5ops.c --cli-args 'd 1000'</pre>
</div>
</div>
<div class="paragraph">
@@ -20748,7 +20750,7 @@ Exiting @ tick 3000 because all threads reached the max instruction count</pre>
<pre>./run \
--emulator gem5 \
--userland userland/posix/pthread_deadlock.c \
--userland-args 1 \
--cli-args 1 \
;</pre>
</div>
</div>
@@ -25909,7 +25911,7 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland "$(./getvar buildroot_target_dir)/usr/bin/python3" --userland-args rootfs_overlay/lkmc/python/hello.py</pre>
<pre>./run --userland "$(./getvar buildroot_target_dir)/usr/bin/python3" --cli-args rootfs_overlay/lkmc/python/hello.py</pre>
</div>
</div>
</div>
@@ -25923,7 +25925,7 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
<pre>./run \
--emulator gem5 \
--userland "$(buildroot_target_dir)/usr/bin/python3" \
--userland-args rootfs_overlay/lkmc/python/hello.py \
--cli-args rootfs_overlay/lkmc/python/hello.py \
;</pre>
</div>
</div>
@@ -25947,7 +25949,7 @@ There are no non-locking atomic types or atomic primitives in POSIX: <a href="ht
--arch aarch64 \
--emulator gem5 \
--userland "$(./getvar --arch aarch64 buildroot_target_dir)/usr/bin/python3" \
--userland-args rootfs_overlay/lkmc/python/hello.py \
--cli-args rootfs_overlay/lkmc/python/hello.py \
;</pre>
</div>
</div>
@@ -26372,7 +26374,7 @@ xdg-open bst_vs_heap_vs_hashmap.tmp.png</pre>
--arch x86_64 \
--emulator gem5 \
--userland userland/cpp/bst_vs_heap_vs_hashmap.cpp \
--userland-args='100000 1 0' \
--cli-args='100000 1 0' \
-- \
--cpu-type=DerivO3CPU \
--caches \
@@ -26591,7 +26593,7 @@ cblas_dgemm( CblasColMajor, CblasNoTrans, CblasTrans,3,3,2 ,1, A,3, B,
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland "$(./getvar userland_build_dir)/submodules/dhrystone/dhrystone" --userland-args 100000000</pre>
<pre>./run --userland "$(./getvar userland_build_dir)/submodules/dhrystone/dhrystone" --cli-args 100000000</pre>
</div>
</div>
<div class="paragraph">
@@ -26613,14 +26615,25 @@ cblas_dgemm( CblasColMajor, CblasNoTrans, CblasTrans,3,3,2 ,1, A,3, B,
</div>
</div>
<div class="paragraph">
<p>Build for <a href="#baremetal">Baremetal</a> execution and run it in baremetal QEMU. TODO: fix the build, just need to factor out all run arguments from <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/build-baremetal">build-baremetal</a> into <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/common.py">common.py</a> and it should just work, no missing syscalls.</p>
<p>Build Dhrystone for <a href="#baremetal">Baremetal</a> and run it in on QEMU:</p>
</div>
<div class="literalblock">
<div class="content">
<pre># Build our Newlib stubs.
./build-baremetal --arch aarch64
./build-dhrystone --arch aarch64 --mode baremetal
./run --arch aarch64 --baremetal "$(./getvar baremetal_build_dir)/submodules/dhrystone/dhrystone"</pre>
./run --arch aarch64 --baremetal "$(./getvar --arch aarch64 baremetal_build_dir)/submodules/dhrystone/dhrystone" --cli-args 10000</pre>
</div>
</div>
<div class="paragraph">
<p>or with gem5:</p>
</div>
<div class="literalblock">
<div class="content">
<pre># Build our Newlib stubs.
./build-baremetal --arch aarch64
./build-dhrystone --arch aarch64 --emulator gem5 --mode baremetal
./run --arch aarch64 --baremetal "$(./getvar --arch aarch64 --emulator gem5 baremetal_build_dir)/submodules/dhrystone/dhrystone" --cli-args 10000 --emulator gem5</pre>
</div>
</div>
<div class="paragraph">
@@ -26701,7 +26714,7 @@ times[3 * ntimes + k] = mysecond() - times[3 * ntimes + k];
</div>
<div class="literalblock">
<div class="content">
<pre>./run --userland "$(./getvar userland_build_dir)/submodules/stream-benchmark/stream_c.exe" --userland-args '100 2'</pre>
<pre>./run --userland "$(./getvar userland_build_dir)/submodules/stream-benchmark/stream_c.exe" --cli-args '100 2'</pre>
</div>
</div>
<div class="paragraph">
@@ -26710,7 +26723,7 @@ times[3 * ntimes + k] = mysecond() - times[3 * ntimes + k];
<div class="literalblock">
<div class="content">
<pre>./build-stream --optimization-level 3
./run --emulator gem5 --userland "$(./getvar userland_build_dir)/submodules/stream-benchmark/stream_c.exe" --userland-args '1000 2'</pre>
./run --emulator gem5 --userland "$(./getvar userland_build_dir)/submodules/stream-benchmark/stream_c.exe" --cli-args '1000 2'</pre>
</div>
</div>
</div>
@@ -27666,6 +27679,9 @@ When instructions do not interpret this operand encoding as the zero register, u
<div class="ulist">
<ul>
<li>
<p><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/freestanding/">userland/freestanding/</a>: freestanding programs that work on any ISA</p>
</li>
<li>
<p><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/arch/x86_64/freestanding/">userland/arch/x86_64/freestanding/</a></p>
</li>
<li>
@@ -32314,7 +32330,7 @@ AArch64, see Procedure Call Standard for the ARM 64-bit Architecture.</p>
<p>the stack pointer</p>
</li>
<li>
<p>NEON: <a href="#aarch64-baremetal-neon-setup">Section 27.9.2, &#8220;aarch64 baremetal NEON setup&#8221;</a></p>
<p>NEON: <a href="#aarch64-baremetal-neon-setup">Section 27.11.2, &#8220;aarch64 baremetal NEON setup&#8221;</a></p>
</li>
<li>
<p>TODO: we don&#8217;t do this currently but maybe we should setup BSS</p>
@@ -32342,12 +32358,88 @@ AArch64, see Procedure Call Standard for the ARM 64-bit Architecture.</p>
</div>
</div>
<div class="sect2">
<h3 id="semihosting"><a class="anchor" href="#semihosting"></a><a class="link" href="#semihosting">27.3. Semihosting</a></h3>
<h3 id="baremetal-linker-script"><a class="anchor" href="#baremetal-linker-script"></a><a class="link" href="#baremetal-linker-script">27.3. Baremetal linker script</a></h3>
<div class="paragraph">
<p>Semihosting is a publicly documented interface specified by ARM Holdings that allows us to do some magic operations very useful in development.</p>
<p>For things to work in baremetal, we often have to layout memory in specific ways.</p>
</div>
<div class="paragraph">
<p>Semihosting is implemented both on some real devices and on simulators such as QEMU and <a href="#gem5-semihosting">gem5 semihosting</a>.</p>
<p>Notably, since we start with <a href="#arm-paging">paging</a> disabled, there are more constraints on where memory can or cannot go.</p>
</div>
<div class="paragraph">
<p>Especially for C programs, this memory layout is specified by a "linker script", which is present at: <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/baremetal/link.ld">baremetal/link.ld</a></p>
</div>
<div class="paragraph">
<p>Note how our linker script also exposes some symbols to C:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>lkmc_heap_low = .;
lkmc_heap_top = .;</pre>
</div>
</div>
<div class="paragraph">
<p>Those for example are required to implement <code>malloc</code> in Newlib. We can play with those variables more explicitly with <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/baremetal/linker_variables.c">baremetal/linker_variables.c</a>:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --arch aarch64 --baremetal baremetal/linker_variables.c</pre>
</div>
</div>
</div>
<div class="sect2">
<h3 id="baremetal-command-line-arguments"><a class="anchor" href="#baremetal-command-line-arguments"></a><a class="link" href="#baremetal-command-line-arguments">27.4. Baremetal command line arguments</a></h3>
<div class="paragraph">
<p>QEMU and gem5 currently supports baremetal CLI arguments!</p>
</div>
<div class="paragraph">
<p>You can see them in action e.g. with:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --arch aarch64 --baremetal userland/c/command_line_arguments.c --cli-args 'aa bb cc'
./run --arch aarch64 --userland userland/c/command_line_arguments.c --cli-args 'aa bb cc'</pre>
</div>
</div>
<div class="paragraph">
<p>both of which output the exact same thing:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>aa
bb
cc</pre>
</div>
</div>
<div class="paragraph">
<p>This is implemented by parsing the command line arguments and placing them into memory where the code will find them.</p>
</div>
<div class="paragraph">
<p>This works by:</p>
</div>
<div class="ulist">
<ul>
<li>
<p>fixing the <code>argc</code> and <code>argv</code> addresses in memory in the <a href="#baremetal-linker-script">Baremetal linker script</a></p>
</li>
<li>
<p>the <a href="#baremetal-bootloaders">Baremetal bootloaders</a> pass those addresses correctly to the call of <code>main</code></p>
</li>
<li>
<p>our Python scripts write the desired binary memory values to a file</p>
</li>
<li>
<p>QEMU loads those files into memory with <code>-device loader</code>: <a href="https://github.com/qemu/qemu/blob/60905286cb5150de854e08279bca7dfc4b549e91/docs/generic-loader.txt" class="bare">https://github.com/qemu/qemu/blob/60905286cb5150de854e08279bca7dfc4b549e91/docs/generic-loader.txt</a></p>
</li>
</ul>
</div>
<div class="paragraph">
<p>It is worth noting that e.g. ARM has a <a href="#semihosting">Semihosting</a> mechanism for loading CLI arguments through <code>SYS_GET_CMDLINE</code>, but our mechanism works in principle for any ISA.</p>
</div>
</div>
<div class="sect2">
<h3 id="semihosting"><a class="anchor" href="#semihosting"></a><a class="link" href="#semihosting">27.5. Semihosting</a></h3>
<div class="paragraph">
<p>Semihosting is a publicly documented interface specified by ARM Holdings that allows us to do some magic operations very useful in development, such as writting to the terminal or reading and writing host files.</p>
</div>
<div class="paragraph">
<p>It is documented at: <a href="https://developer.arm.com/docs/100863/latest/introduction" class="bare">https://developer.arm.com/docs/100863/latest/introduction</a></p>
@@ -32463,7 +32555,7 @@ svc 0x00123456</pre>
</ul>
</div>
<div class="sect3">
<h4 id="gem5-semihosting"><a class="anchor" href="#gem5-semihosting"></a><a class="link" href="#gem5-semihosting">27.3.1. gem5 semihosting</a></h4>
<h4 id="gem5-semihosting"><a class="anchor" href="#gem5-semihosting"></a><a class="link" href="#gem5-semihosting">27.5.1. gem5 semihosting</a></h4>
<div class="paragraph">
<p>For gem5, you need:</p>
</div>
@@ -32478,7 +32570,7 @@ svc 0x00123456</pre>
</div>
</div>
<div class="sect2">
<h3 id="gem5-baremetal-carriage-return"><a class="anchor" href="#gem5-baremetal-carriage-return"></a><a class="link" href="#gem5-baremetal-carriage-return">27.4. gem5 baremetal carriage return</a></h3>
<h3 id="gem5-baremetal-carriage-return"><a class="anchor" href="#gem5-baremetal-carriage-return"></a><a class="link" href="#gem5-baremetal-carriage-return">27.6. gem5 baremetal carriage return</a></h3>
<div class="paragraph">
<p>TODO: our example is printing newlines without automatic carriage return <code>\r</code> as in:</p>
</div>
@@ -32501,7 +32593,7 @@ svc 0x00123456</pre>
</div>
</div>
<div class="sect2">
<h3 id="baremetal-host-packaged-toolchain"><a class="anchor" href="#baremetal-host-packaged-toolchain"></a><a class="link" href="#baremetal-host-packaged-toolchain">27.5. Baremetal host packaged toolchain</a></h3>
<h3 id="baremetal-host-packaged-toolchain"><a class="anchor" href="#baremetal-host-packaged-toolchain"></a><a class="link" href="#baremetal-host-packaged-toolchain">27.7. Baremetal host packaged toolchain</a></h3>
<div class="paragraph">
<p>For <code>arm</code>, some baremetal examples compile fine with:</p>
</div>
@@ -32537,13 +32629,13 @@ collect2: error: ld returned 1 exit status</pre>
</div>
</div>
<div class="sect2">
<h3 id="baremetal-cpp"><a class="anchor" href="#baremetal-cpp"></a><a class="link" href="#baremetal-cpp">27.6. Baremetal C++</a></h3>
<h3 id="baremetal-cpp"><a class="anchor" href="#baremetal-cpp"></a><a class="link" href="#baremetal-cpp">27.8. Baremetal C++</a></h3>
<div class="paragraph">
<p>Didn&#8217;t get it working, traking at: <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/issues/119" class="bare">https://github.com/cirosantilli/linux-kernel-module-cheat/issues/119</a></p>
</div>
</div>
<div class="sect2">
<h3 id="gdb-builtin-cpu-simulator"><a class="anchor" href="#gdb-builtin-cpu-simulator"></a><a class="link" href="#gdb-builtin-cpu-simulator">27.7. GDB builtin CPU simulator</a></h3>
<h3 id="gdb-builtin-cpu-simulator"><a class="anchor" href="#gdb-builtin-cpu-simulator"></a><a class="link" href="#gdb-builtin-cpu-simulator">27.9. GDB builtin CPU simulator</a></h3>
<div class="paragraph">
<p>It is incredible, but GDB also has a CPU simulator inside of it as documented at: <a href="https://sourceware.org/gdb/onlinedocs/gdb/Target-Commands.html" class="bare">https://sourceware.org/gdb/onlinedocs/gdb/Target-Commands.html</a></p>
</div>
@@ -32603,7 +32695,7 @@ starti</pre>
</ul>
</div>
<div class="sect3">
<h4 id="gdb-builtin-cpu-simulator-userland"><a class="anchor" href="#gdb-builtin-cpu-simulator-userland"></a><a class="link" href="#gdb-builtin-cpu-simulator-userland">27.7.1. GDB builtin CPU simulator userland</a></h4>
<h4 id="gdb-builtin-cpu-simulator-userland"><a class="anchor" href="#gdb-builtin-cpu-simulator-userland"></a><a class="link" href="#gdb-builtin-cpu-simulator-userland">27.9.1. GDB builtin CPU simulator userland</a></h4>
<div class="paragraph">
<p>Since I had this compiled, I also decided to try it out on userland.</p>
</div>
@@ -32638,7 +32730,7 @@ starti</pre>
</div>
</div>
<div class="sect2">
<h3 id="arm-baremetal"><a class="anchor" href="#arm-baremetal"></a><a class="link" href="#arm-baremetal">27.8. ARM baremetal</a></h3>
<h3 id="arm-baremetal"><a class="anchor" href="#arm-baremetal"></a><a class="link" href="#arm-baremetal">27.10. ARM baremetal</a></h3>
<div class="paragraph">
<p>In this section we will focus on learning ARM architecture concepts that can only learnt on baremetal setups.</p>
</div>
@@ -32646,7 +32738,7 @@ starti</pre>
<p>Userland information can be found at: <a href="https://github.com/cirosantilli/arm-assembly-cheat" class="bare">https://github.com/cirosantilli/arm-assembly-cheat</a></p>
</div>
<div class="sect3">
<h4 id="arm-exception-levels"><a class="anchor" href="#arm-exception-levels"></a><a class="link" href="#arm-exception-levels">27.8.1. ARM exception levels</a></h4>
<h4 id="arm-exception-levels"><a class="anchor" href="#arm-exception-levels"></a><a class="link" href="#arm-exception-levels">27.10.1. ARM exception levels</a></h4>
<div class="paragraph">
<p>ARM exception levels are analogous to x86 <a href="#ring0">rings</a>.</p>
</div>
@@ -32775,13 +32867,13 @@ CurrentEL.EL 0x3</pre>
<p>According to <a href="#armarm7">ARMv7 architecture reference manual</a>, access to that register is controlled by other registers <code>NSACR.{CP11, CP10}</code> and <code>HCPTR</code> so those must be turned off, but I&#8217;m lazy to investigate now, even just trying to dump those registers in <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/arch/arm/dump_regs.c">userland/arch/arm/dump_regs.c</a> also leads to exceptions&#8230;&#8203;</p>
</div>
<div class="sect4">
<h5 id="arm-change-exception-level"><a class="anchor" href="#arm-change-exception-level"></a><a class="link" href="#arm-change-exception-level">27.8.1.1. ARM change exception level</a></h5>
<h5 id="arm-change-exception-level"><a class="anchor" href="#arm-change-exception-level"></a><a class="link" href="#arm-change-exception-level">27.10.1.1. ARM change exception level</a></h5>
<div class="paragraph">
<p>TODO. Create a minimal runnable example of going into EL0 and jumping to EL1.</p>
</div>
</div>
<div class="sect4">
<h5 id="arm-sp0-vs-spx"><a class="anchor" href="#arm-sp0-vs-spx"></a><a class="link" href="#arm-sp0-vs-spx">27.8.1.2. ARM SP0 vs SPx</a></h5>
<h5 id="arm-sp0-vs-spx"><a class="anchor" href="#arm-sp0-vs-spx"></a><a class="link" href="#arm-sp0-vs-spx">27.10.1.2. ARM SP0 vs SPx</a></h5>
<div class="paragraph">
<p>See <a href="#armarm8-db">ARMv8 architecture reference manual db</a> D1.6.2 "The stack pointer registers".</p>
</div>
@@ -32794,7 +32886,7 @@ CurrentEL.EL 0x3</pre>
</div>
</div>
<div class="sect3">
<h4 id="arm-svc-instruction"><a class="anchor" href="#arm-svc-instruction"></a><a class="link" href="#arm-svc-instruction">27.8.2. ARM SVC instruction</a></h4>
<h4 id="arm-svc-instruction"><a class="anchor" href="#arm-svc-instruction"></a><a class="link" href="#arm-svc-instruction">27.10.2. ARM SVC instruction</a></h4>
<div class="paragraph">
<p>This is the most basic example of exception handling we have.</p>
</div>
@@ -33143,7 +33235,7 @@ IN: main
</ul>
</div>
<div class="sect4">
<h5 id="armv8-exception-vector-table-format"><a class="anchor" href="#armv8-exception-vector-table-format"></a><a class="link" href="#armv8-exception-vector-table-format">27.8.2.1. ARMv8 exception vector table format</a></h5>
<h5 id="armv8-exception-vector-table-format"><a class="anchor" href="#armv8-exception-vector-table-format"></a><a class="link" href="#armv8-exception-vector-table-format">27.10.2.1. ARMv8 exception vector table format</a></h5>
<div class="paragraph">
<p>The vector table format is described on <a href="#armarm8">ARMv8 architecture reference manual</a> Table D1-7 "Vector offsets from vector table base address".</p>
</div>
@@ -33283,29 +33375,29 @@ IN: main
</div>
</div>
<div class="sect4">
<h5 id="arm-esr-register"><a class="anchor" href="#arm-esr-register"></a><a class="link" href="#arm-esr-register">27.8.2.2. ARM ESR register</a></h5>
<h5 id="arm-esr-register"><a class="anchor" href="#arm-esr-register"></a><a class="link" href="#arm-esr-register">27.10.2.2. ARM ESR register</a></h5>
<div class="paragraph">
<p>Exception Syndrome Register.</p>
</div>
<div class="paragraph">
<p>See example at: <a href="#arm-svc-instruction">Section 27.8.2, &#8220;ARM SVC instruction&#8221;</a></p>
<p>See example at: <a href="#arm-svc-instruction">Section 27.10.2, &#8220;ARM SVC instruction&#8221;</a></p>
</div>
<div class="paragraph">
<p>Documentation: <a href="#armarm8-db">ARMv8 architecture reference manual db</a> D12.2.36 "ESR_EL1, Exception Syndrome Register (EL1)".</p>
</div>
</div>
<div class="sect4">
<h5 id="arm-elr-register"><a class="anchor" href="#arm-elr-register"></a><a class="link" href="#arm-elr-register">27.8.2.3. ARM ELR register</a></h5>
<h5 id="arm-elr-register"><a class="anchor" href="#arm-elr-register"></a><a class="link" href="#arm-elr-register">27.10.2.3. ARM ELR register</a></h5>
<div class="paragraph">
<p>Exception Link Register.</p>
</div>
<div class="paragraph">
<p>See the example at: <a href="#arm-svc-instruction">Section 27.8.2, &#8220;ARM SVC instruction&#8221;</a></p>
<p>See the example at: <a href="#arm-svc-instruction">Section 27.10.2, &#8220;ARM SVC instruction&#8221;</a></p>
</div>
</div>
</div>
<div class="sect3">
<h4 id="arm-baremetal-multicore"><a class="anchor" href="#arm-baremetal-multicore"></a><a class="link" href="#arm-baremetal-multicore">27.8.3. ARM baremetal multicore</a></h4>
<h4 id="arm-baremetal-multicore"><a class="anchor" href="#arm-baremetal-multicore"></a><a class="link" href="#arm-baremetal-multicore">27.10.3. ARM baremetal multicore</a></h4>
<div class="paragraph">
<p>Examples:</p>
</div>
@@ -33384,7 +33476,7 @@ IN: main
<p>Bibliography: <a href="https://stackoverflow.com/questions/980999/what-does-multicore-assembly-language-look-like/33651438#33651438" class="bare">https://stackoverflow.com/questions/980999/what-does-multicore-assembly-language-look-like/33651438#33651438</a></p>
</div>
<div class="sect4">
<h5 id="arm-wfe-and-sev-instructions"><a class="anchor" href="#arm-wfe-and-sev-instructions"></a><a class="link" href="#arm-wfe-and-sev-instructions">27.8.3.1. ARM WFE and SEV instructions</a></h5>
<h5 id="arm-wfe-and-sev-instructions"><a class="anchor" href="#arm-wfe-and-sev-instructions"></a><a class="link" href="#arm-wfe-and-sev-instructions">27.10.3.1. ARM WFE and SEV instructions</a></h5>
<div class="paragraph">
<p>The WFE and SEV instructions are just hints: a compliant implementation can treat them as NOPs.</p>
</div>
@@ -33537,7 +33629,7 @@ IN: main
<p>For how userland spinlocks and mutexes are implemented see <a href="#userland-mutex-implementation">Userland mutex implementation</a>.</p>
</div>
<div class="sect5">
<h6 id="arm-wfe-global-monitor-events"><a class="anchor" href="#arm-wfe-global-monitor-events"></a><a class="link" href="#arm-wfe-global-monitor-events">27.8.3.1.1. ARM WFE global monitor events</a></h6>
<h6 id="arm-wfe-global-monitor-events"><a class="anchor" href="#arm-wfe-global-monitor-events"></a><a class="link" href="#arm-wfe-global-monitor-events">27.10.3.1.1. ARM WFE global monitor events</a></h6>
<div class="paragraph">
<p>Examples:</p>
</div>
@@ -33568,7 +33660,7 @@ IN: main
</div>
</div>
<div class="sect5">
<h6 id="wfe-from-userland"><a class="anchor" href="#wfe-from-userland"></a><a class="link" href="#wfe-from-userland">27.8.3.1.2. WFE from userland</a></h6>
<h6 id="wfe-from-userland"><a class="anchor" href="#wfe-from-userland"></a><a class="link" href="#wfe-from-userland">27.10.3.1.2. WFE from userland</a></h6>
<div class="paragraph">
<p>WFE and SEV are usable from userland, and are part of an efficient spinlock implementation (which userland should arguably stay away from and rather use the <a href="#futex-system-call">futex system call</a> which allow for non busy sleep instead), which maybe is not something that userland should ever tho and just stick to mutexes?</p>
</div>
@@ -33675,7 +33767,7 @@ IN: main
</div>
</div>
<div class="sect5">
<h6 id="armv8-spinlock-pattern"><a class="anchor" href="#armv8-spinlock-pattern"></a><a class="link" href="#armv8-spinlock-pattern">27.8.3.1.3. ARMv8 spinlock pattern</a></h6>
<h6 id="armv8-spinlock-pattern"><a class="anchor" href="#armv8-spinlock-pattern"></a><a class="link" href="#armv8-spinlock-pattern">27.10.3.1.3. ARMv8 spinlock pattern</a></h6>
<div class="paragraph">
<p><a href="http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16277.html" class="bare">http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16277.html</a></p>
</div>
@@ -33694,7 +33786,7 @@ IN: main
</div>
</div>
<div class="sect5">
<h6 id="gem5-arm-wfe"><a class="anchor" href="#gem5-arm-wfe"></a><a class="link" href="#gem5-arm-wfe">27.8.3.1.4. gem5 ARM WFE</a></h6>
<h6 id="gem5-arm-wfe"><a class="anchor" href="#gem5-arm-wfe"></a><a class="link" href="#gem5-arm-wfe">27.10.3.1.4. gem5 ARM WFE</a></h6>
<div class="paragraph">
<p>gem5 390a74f59934b85d91489f8a563450d8321b602d does not sleep on the first WFE on either syscall emulation or full system, because the code does:</p>
</div>
@@ -33736,14 +33828,14 @@ IN: main
</div>
</div>
<div class="sect5">
<h6 id="arm-yield-instruction"><a class="anchor" href="#arm-yield-instruction"></a><a class="link" href="#arm-yield-instruction">27.8.3.1.5. ARM YIELD instruction</a></h6>
<h6 id="arm-yield-instruction"><a class="anchor" href="#arm-yield-instruction"></a><a class="link" href="#arm-yield-instruction">27.10.3.1.5. ARM YIELD instruction</a></h6>
<div class="paragraph">
<p><a href="https://stackoverflow.com/questions/59311066/how-does-the-arm-yield-instruction-inform-other-threads-that-they-could-start-a" class="bare">https://stackoverflow.com/questions/59311066/how-does-the-arm-yield-instruction-inform-other-threads-that-they-could-start-a</a></p>
</div>
</div>
</div>
<div class="sect4">
<h5 id="arm-ldaxr-and-stlxr-instructions"><a class="anchor" href="#arm-ldaxr-and-stlxr-instructions"></a><a class="link" href="#arm-ldaxr-and-stlxr-instructions">27.8.3.2. ARM LDAXR and STLXR instructions</a></h5>
<h5 id="arm-ldaxr-and-stlxr-instructions"><a class="anchor" href="#arm-ldaxr-and-stlxr-instructions"></a><a class="link" href="#arm-ldaxr-and-stlxr-instructions">27.10.3.2. ARM LDAXR and STLXR instructions</a></h5>
<div class="paragraph">
<p>Can be used to implement atomic variables, see also:</p>
</div>
@@ -33762,7 +33854,7 @@ IN: main
</div>
</div>
<div class="sect4">
<h5 id="arm-psci"><a class="anchor" href="#arm-psci"></a><a class="link" href="#arm-psci">27.8.3.3. ARM PSCI</a></h5>
<h5 id="arm-psci"><a class="anchor" href="#arm-psci"></a><a class="link" href="#arm-psci">27.10.3.3. ARM PSCI</a></h5>
<div class="paragraph">
<p>In QEMU, CPU 1 starts in a halted state. This can be observed from GDB, where:</p>
</div>
@@ -33812,14 +33904,14 @@ IN: main
</div>
</div>
<div class="sect4">
<h5 id="arm-dmb-instruction"><a class="anchor" href="#arm-dmb-instruction"></a><a class="link" href="#arm-dmb-instruction">27.8.3.4. ARM DMB instruction</a></h5>
<h5 id="arm-dmb-instruction"><a class="anchor" href="#arm-dmb-instruction"></a><a class="link" href="#arm-dmb-instruction">27.10.3.4. ARM DMB instruction</a></h5>
<div class="paragraph">
<p>TODO: create and study a minimal examples in gem5 where the DMB instruction leads to less cycles: <a href="https://stackoverflow.com/questions/15491751/real-life-use-cases-of-barriers-dsb-dmb-isb-in-arm" class="bare">https://stackoverflow.com/questions/15491751/real-life-use-cases-of-barriers-dsb-dmb-isb-in-arm</a></p>
</div>
</div>
</div>
<div class="sect3">
<h4 id="arm-timer"><a class="anchor" href="#arm-timer"></a><a class="link" href="#arm-timer">27.8.4. ARM timer</a></h4>
<h4 id="arm-timer"><a class="anchor" href="#arm-timer"></a><a class="link" href="#arm-timer">27.10.4. ARM timer</a></h4>
<div class="paragraph">
<p>The ARM timer is the simplest way to generate hardware interrupts periodically, and therefore serves as the simples example of <a href="#arm-gic">ARM GIC</a> usage.</p>
</div>
@@ -33972,7 +34064,7 @@ cntvct_el0 0x3CF516F</pre>
</div>
</div>
<div class="sect3">
<h4 id="arm-gic"><a class="anchor" href="#arm-gic"></a><a class="link" href="#arm-gic">27.8.5. ARM GIC</a></h4>
<h4 id="arm-gic"><a class="anchor" href="#arm-gic"></a><a class="link" href="#arm-gic">27.10.5. ARM GIC</a></h4>
<div class="paragraph">
<p>Generic Interrupt Controller.</p>
</div>
@@ -34014,7 +34106,7 @@ cntvct_el0 0x3CF516F</pre>
</div>
</div>
<div class="sect3">
<h4 id="arm-paging"><a class="anchor" href="#arm-paging"></a><a class="link" href="#arm-paging">27.8.6. ARM paging</a></h4>
<h4 id="arm-paging"><a class="anchor" href="#arm-paging"></a><a class="link" href="#arm-paging">27.10.6. ARM paging</a></h4>
<div class="paragraph">
<p>TODO create a minimal working aarch64 example analogous to the x86 one at: <a href="https://github.com/cirosantilli/x86-bare-metal-examples/blob/6dc9a73830fc05358d8d66128f740ef9906f7677/paging.S" class="bare">https://github.com/cirosantilli/x86-bare-metal-examples/blob/6dc9a73830fc05358d8d66128f740ef9906f7677/paging.S</a></p>
</div>
@@ -34044,7 +34136,7 @@ cntvct_el0 0x3CF516F</pre>
</div>
</div>
<div class="sect3">
<h4 id="arm-baremetal-bibliography"><a class="anchor" href="#arm-baremetal-bibliography"></a><a class="link" href="#arm-baremetal-bibliography">27.8.7. ARM baremetal bibliography</a></h4>
<h4 id="arm-baremetal-bibliography"><a class="anchor" href="#arm-baremetal-bibliography"></a><a class="link" href="#arm-baremetal-bibliography">27.10.7. ARM baremetal bibliography</a></h4>
<div class="paragraph">
<p>First, also consider the userland bibliography: <a href="#arm-assembly-bibliography">Section 24.9, &#8220;ARM assembly bibliography&#8221;</a>.</p>
</div>
@@ -34071,7 +34163,7 @@ cntvct_el0 0x3CF516F</pre>
</ul>
</div>
<div class="sect4">
<h5 id="nienfengyaoarmv8-bare-metal"><a class="anchor" href="#nienfengyaoarmv8-bare-metal"></a><a class="link" href="#nienfengyaoarmv8-bare-metal">27.8.7.1. NienfengYao/armv8-bare-metal</a></h5>
<h5 id="nienfengyaoarmv8-bare-metal"><a class="anchor" href="#nienfengyaoarmv8-bare-metal"></a><a class="link" href="#nienfengyaoarmv8-bare-metal">27.10.7.1. NienfengYao/armv8-bare-metal</a></h5>
<div class="paragraph">
<p><a href="https://github.com/NienfengYao/armv8-bare-metal" class="bare">https://github.com/NienfengYao/armv8-bare-metal</a></p>
</div>
@@ -34130,7 +34222,7 @@ cntvct_el0 0x3CF516F</pre>
</div>
</div>
<div class="sect4">
<h5 id="tukl-msdgem5-bare-metal"><a class="anchor" href="#tukl-msdgem5-bare-metal"></a><a class="link" href="#tukl-msdgem5-bare-metal">27.8.7.2. tukl-msd/gem5.bare-metal</a></h5>
<h5 id="tukl-msdgem5-bare-metal"><a class="anchor" href="#tukl-msdgem5-bare-metal"></a><a class="link" href="#tukl-msdgem5-bare-metal">27.10.7.2. tukl-msd/gem5.bare-metal</a></h5>
<div class="paragraph">
<p><a href="https://github.com/tukl-msd/gem5.bare-metal" class="bare">https://github.com/tukl-msd/gem5.bare-metal</a></p>
</div>
@@ -34172,7 +34264,7 @@ make CROSS_COMPILE_DIR=/usr/bin
</div>
</div>
<div class="sect2">
<h3 id="how-we-got-some-baremetal-stuff-to-work"><a class="anchor" href="#how-we-got-some-baremetal-stuff-to-work"></a><a class="link" href="#how-we-got-some-baremetal-stuff-to-work">27.9. How we got some baremetal stuff to work</a></h3>
<h3 id="how-we-got-some-baremetal-stuff-to-work"><a class="anchor" href="#how-we-got-some-baremetal-stuff-to-work"></a><a class="link" href="#how-we-got-some-baremetal-stuff-to-work">27.11. How we got some baremetal stuff to work</a></h3>
<div class="paragraph">
<p>It is nice when thing just work.</p>
</div>
@@ -34180,7 +34272,7 @@ make CROSS_COMPILE_DIR=/usr/bin
<p>But you can also learn a thing or two from how I actually made them work in the first place.</p>
</div>
<div class="sect3">
<h4 id="find-the-uart-address"><a class="anchor" href="#find-the-uart-address"></a><a class="link" href="#find-the-uart-address">27.9.1. Find the UART address</a></h4>
<h4 id="find-the-uart-address"><a class="anchor" href="#find-the-uart-address"></a><a class="link" href="#find-the-uart-address">27.11.1. Find the UART address</a></h4>
<div class="paragraph">
<p>Enter the QEMU console:</p>
</div>
@@ -34216,7 +34308,7 @@ make CROSS_COMPILE_DIR=/usr/bin
</div>
</div>
<div class="sect3">
<h4 id="aarch64-baremetal-neon-setup"><a class="anchor" href="#aarch64-baremetal-neon-setup"></a><a class="link" href="#aarch64-baremetal-neon-setup">27.9.2. aarch64 baremetal NEON setup</a></h4>
<h4 id="aarch64-baremetal-neon-setup"><a class="anchor" href="#aarch64-baremetal-neon-setup"></a><a class="link" href="#aarch64-baremetal-neon-setup">27.11.2. aarch64 baremetal NEON setup</a></h4>
<div class="paragraph">
<p>Inside <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/baremetal/lib/aarch64.S">baremetal/lib/aarch64.S</a> there is a chunk of code that enables floating point operations:</p>
</div>
@@ -34340,7 +34432,7 @@ ISB</pre>
</div>
</div>
<div class="sect2">
<h3 id="baremetal-tests"><a class="anchor" href="#baremetal-tests"></a><a class="link" href="#baremetal-tests">27.10. Baremetal tests</a></h3>
<h3 id="baremetal-tests"><a class="anchor" href="#baremetal-tests"></a><a class="link" href="#baremetal-tests">27.12. Baremetal tests</a></h3>
<div class="paragraph">
<p>Baremetal tests work exactly like <a href="#user-mode-tests">User mode tests</a>, except that you have to add the <code>--mode baremetal</code> option, for example:</p>
</div>
@@ -34995,7 +35087,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">gem5 busy loop</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">a18f28e263c91362519ef550150b5c9d75fa3679 + 1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --static --userland userland/gcc/busy_loop.c --userland-args 1000000</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --static --userland userland/gcc/busy_loop.c --cli-args 1000000</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^6</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">18</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.4005699 * 10^7</p></td>
@@ -35005,7 +35097,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">gem5 busy loop for a debug build</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">a18f28e263c91362519ef550150b5c9d75fa3679 + 1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --gem5-build-type debug --static --userland userland/gcc/busy_loop.c --userland-args 100000</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --gem5-build-type debug --static --userland userland/gcc/busy_loop.c --cli-args 100000</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^5</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">33</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.405682 * 10^6</p></td>
@@ -35015,7 +35107,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">gem5 busy loop for a fast build</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">0d5a41a3f88fcd7ed40fc19474fe5aed0463663f + 1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0 -static</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --gem5-build-type fast --static --userland userland/gcc/busy_loop.c --userland-args 1000000</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --gem5-build-type fast --static --userland userland/gcc/busy_loop.c --cli-args 1000000</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^6</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">15</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.4005699 * 10^7</p></td>
@@ -35025,7 +35117,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">gem5 busy loop for a <a href="#gem5-cpu-types">TimingSimpleCPU</a></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">a18f28e263c91362519ef550150b5c9d75fa3679 + 1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --arch aarch64 --static --userland userland/gcc/busy_loop.c --userland-args 1000000 -- --cpu-type TimingSimpleCPU --caches</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --arch aarch64 --static --userland userland/gcc/busy_loop.c --cli-args 1000000 -- --cpu-type TimingSimpleCPU --caches</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^6</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">26</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.4005699 * 10^7</p></td>
@@ -35035,7 +35127,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">gem5 busy loop for a <a href="#gem5-cpu-types">MinorCPU</a></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">a18f28e263c91362519ef550150b5c9d75fa3679 + 1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --arch aarch64 --userland userland/gcc/busy_loop.c --userland-args 1000000 -- --cpu-type MinorCPU --caches</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --arch aarch64 --userland userland/gcc/busy_loop.c --cli-args 1000000 -- --cpu-type MinorCPU --caches</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^6</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">31</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1.1018152 * 10^7</p></td>
@@ -35075,7 +35167,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">5d233f2664a78789f9907d27e2a40e86cefad595</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="#stream-benchmark">STREAM benchmark</a> <code>-O3</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --userland-args 1000000 --trace ExecAll</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --cli-args 1000000 --trace ExecAll</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">3 * 10^5 * 2</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">64</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">9.9674773 * 10^7</p></td>
@@ -35085,7 +35177,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">glibc C pre-main effects</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">ab6f7331406b22f8ab6e2df5f8b8e464fb35b611</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/c/m5ops.c">userland/c/m5ops.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --userland-args e</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --cli-args e</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1.26479 * 10^5</p></td>
@@ -35095,7 +35187,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">ab6f7331406b22f8ab6e2df5f8b8e464fb35b611</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">glibc C pre-main <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/c/m5ops.c">userland/c/m5ops.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --userland-args e --gem5-build-type debug</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --cli-args e --gem5-build-type debug</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1.26479 * 10^5</p></td>
@@ -35105,7 +35197,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">ab6f7331406b22f8ab6e2df5f8b8e464fb35b611</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">glibc C++ pre-main <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/cpp/m5ops.cpp">userland/cpp/m5ops.cpp</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --userland-args e</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --cli-args e</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.385012 * 10^6</p></td>
@@ -35115,7 +35207,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">ab6f7331406b22f8ab6e2df5f8b8e464fb35b611</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">glibc C++ pre-main <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/cpp/m5ops.cpp">userland/cpp/m5ops.cpp</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --userland-args e --gem5-build-type debug</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>gem5 --arch aarch64 --cli-args e --gem5-build-type debug</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">1</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">25</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.385012 * 10^6</p></td>
@@ -35145,7 +35237,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">Check the effect of an ExecAll log (log every instruction) on execution time, compare to analogous run without it. <code>trace.txt</code> size: 3.5GB. 5x slowdown observed with output to a hard disk.</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">d29a07ddad499f273cc90dd66e40f8474b5dfc40</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --userland-args 1000000 --gem5-worktree master --trace ExecAll</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --cli-args 1000000 --gem5-worktree master --trace ExecAll</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^6</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.4106774 * 10^7</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">136</p></td>
@@ -35155,7 +35247,7 @@ instructions 124346081</pre>
<td class="tableblock halign-left valign-top"><p class="tableblock">Same as above but with run command manually hacked to output to a ramfs. Slightly faster, but the bulk was still just in log format operations!</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">d29a07ddad499f273cc90dd66e40f8474b5dfc40</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/gcc/busy_loop.c">userland/gcc/busy_loop.c</a> <code>-O0</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --userland-args 1000000 --gem5-worktree master --trace ExecAll</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock"><code>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --cli-args 1000000 --gem5-worktree master --trace ExecAll</code></p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">10^6</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">2.4106774 * 10^7</p></td>
<td class="tableblock halign-left valign-top"><p class="tableblock">107</p></td>
@@ -35171,7 +35263,7 @@ instructions 124346081</pre>
</div>
<div class="literalblock">
<div class="content">
<pre>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --userland-args '1 10000000'
<pre>./run --arch aarch64 --emulator gem5 --userland userland/gcc/busy_loop.c --cli-args '1 10000000'
./gem5-stat --arch aarch64 sim_insts</pre>
</div>
</div>
@@ -35298,7 +35390,7 @@ time \
--arch arm \
--emulator gem5 \
--userland "$(./getvar --arch arm buildroot_build_build_dir)/dhrystone-2/dhrystone" \
--userland-args 'asdf qwer' \
--cli-args 'asdf qwer' \
;</pre>
</div>
</div>