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https://github.com/cirosantilli/linux-kernel-module-cheat.git
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Previously had wonky line pointer in asm_main. New interface simpler and more portable. Add tests for ASSERT_EQ_ and family in arm and aarch64, previously on x86_64. ASSERT_EQ_ and family in ARM can now either take =123, =addr or var, before this the = was added on macros so var was not possible. Define the main function directly in assembly, the C driver was useless.
91 lines
2.5 KiB
ArmAsm
91 lines
2.5 KiB
ArmAsm
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-vcvt-instruction */
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#include <lkmc.h>
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LKMC_PROLOGUE
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/* SIMD positive. */
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.data
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vcvt_positive_0: .float 1.25, 2.5, 3.75, 4.0
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vcvt_positive_expect: .word 1, 2, 3, 4
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.bss
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vcvt_positive_result: .skip 0x10
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.text
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ldr r0, =vcvt_positive_0
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vld1.32 {q0}, [r0]
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vcvt.u32.f32 q1, q0
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ldr r0, =vcvt_positive_result
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vst1.32 {q1}, [r0]
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LKMC_ASSERT_MEMCMP(vcvt_positive_result, vcvt_positive_expect, =0x10)
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/* SIMD negative. */
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.data
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vcvt_negative_0: .float -1.25, -2.5, -3.75, -4.0
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vcvt_negative_expect: .word -1, -2, -3, -4
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.bss
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vcvt_negative_result: .skip 0x10
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.text
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ldr r0, =vcvt_negative_0
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vld1.32 {q0}, [r0]
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vcvt.s32.f32 q1, q0
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ldr r0, =vcvt_negative_result
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vst1.32 {q1}, [r0]
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LKMC_ASSERT_MEMCMP(vcvt_negative_result, vcvt_negative_expect, =0x10)
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/* Floating point. */
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.data
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vcvt_positive_float_0: .float 1.5, 2.5
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vcvt_positive_float_expect: .word 1
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.float 2.5
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.bss
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vcvt_positive_float_result: .skip 0x8
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.text
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ldr r0, =vcvt_positive_float_0
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vld1.32 {d0}, [r0]
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vcvt.u32.f32 s0, s0
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ldr r0, =vcvt_positive_float_result
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vst1.32 {d0}, [r0]
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LKMC_ASSERT_MEMCMP(vcvt_positive_float_result, vcvt_positive_float_expect, =0x8)
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/* Floating point but with immediates.
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*
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* You have to worry of course about representability of
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* the immediate in 4 bytes, which is even more fun for
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* floating point numbers :-)
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*
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* Doing this mostly to illustrate the joys of vmov.i32.
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*
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* For some reason, there is no vmov.i32 sn, only dn.
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* If you try to use sn, it does the same as .f32 and
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* stores a float instead. Horrible!
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*/
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vmov.f32 d0, 1.5
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vcvt.u32.f32 s0, s0
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vmov.i32 d1, 1
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vcmp.f32 s0, s2
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vmrs apsr_nzcv, fpscr
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LKMC_ASSERT(beq)
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/* Check that s1 wasn't modified by vcvt. */
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vmov.f32 s2, 1.5
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vcmp.f32 s1, s2
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vmrs apsr_nzcv, fpscr
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LKMC_ASSERT(beq)
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/* Floating point double precision. */
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.data
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vcvt_positive_double_0: .double 1.5
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vcvt_positive_double_expect: .word 1
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.bss
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vcvt_positive_double_result: .skip 0x8
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.text
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ldr r0, =vcvt_positive_double_0
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vld1.64 {d0}, [r0]
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vcvt.u32.f64 s0, d0
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ldr r0, =vcvt_positive_double_result
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vst1.32 {d0}, [r0]
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LKMC_ASSERT_MEMCMP(
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vcvt_positive_double_result,
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vcvt_positive_double_expect,
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=0x4
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)
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LKMC_EPILOGUE
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