mirror of
https://github.com/cirosantilli/linux-kernel-module-cheat.git
synced 2026-01-23 02:05:57 +01:00
c8c4f89854
Previously had wonky line pointer in asm_main. New interface simpler and more portable. Add tests for ASSERT_EQ_ and family in arm and aarch64, previously on x86_64. ASSERT_EQ_ and family in ARM can now either take =123, =addr or var, before this the = was added on macros so var was not possible. Define the main function directly in assembly, the C driver was useless.
52 lines
1.3 KiB
ArmAsm
52 lines
1.3 KiB
ArmAsm
/* https://github.com/cirosantilli/linux-kernel-module-cheat#armv8-aarch64-x31-register */
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#include <lkmc.h>
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LKMC_PROLOGUE
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/* ERROR: can never use the name x31. */
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#if 0
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mov x31, 31
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#endif
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/* mov (register) is an alias for ORR, which accepts xzr. */
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mov x19, 1
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mov x19, xzr
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LKMC_ASSERT_EQ(x19, =0)
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/* Same encoding as the mov version. */
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mov x19, 1
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orr x19, xzr, xzr
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LKMC_ASSERT_EQ(x19, =0)
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/* So, orr, which is not an alias, can only take xzr, not sp. */
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#if 0
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orr sp, sp, sp
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#endif
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/* Zero register discards result if written to. */
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mov x19, 1
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orr xzr, x19, x19
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LKMC_ASSERT_EQ(xzr, =0)
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/* MOV (to/from SP) is an alias for ADD (immediate). */
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mov x19, sp
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mov sp, 1
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/* Alias to add. */
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mov x20, sp
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/* Exact same encoding as above. */
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add x20, sp, 0
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mov sp, x19
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LKMC_ASSERT_EQ(x20, =1)
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/* So, ADD (immediate), which is not an alias, can only take sp, not xzr. */
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#if 0
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/* Error: integer register expected in the extended/shifted operand register at operand 3 -- `add xzr,xzr,1' */
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add xzr, xzr, 1
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#endif
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/* Note however that ADD (register), unlike ADD (immediate),
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* does not say anything about SP, and so does accept xzr just fine.
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*/
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add xzr, xzr, xzr
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LKMC_EPILOGUE
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