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80 lines
1.9 KiB
ArmAsm
80 lines
1.9 KiB
ArmAsm
/* https://cirosantilli.com/linux-kernel-module-cheat#arm-shift-suffixes */
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#include <lkmc.h>
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LKMC_PROLOGUE
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/* lsr */
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ldr r0, =0xFFF00FFF
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mov r1, r0, lsl 8
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ldr r2, =0xF00FFF00
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* lsl */
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ldr r0, =0xFFF00FFF
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mov r1, r0, lsr 8
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ldr r2, =0x00FFF00F
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* ror */
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ldr r0, =0xFFF00FFF
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mov r1, r0, ror 8
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ldr r2, =0xFFFFF00F
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* asr negative */
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ldr r0, =0x80000008
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mov r1, r0, asr 1
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ldr r2, =0xC0000004
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* asr positive */
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ldr r0, =0x40000008
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mov r1, r0, asr 1
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ldr r2, =0x20000004
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* There are also direct shift mnemonics for the mov shifts.
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*
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* They assembly to the exact same bytes as the mov version
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*/
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ldr r0, =0xFFF00FFF
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lsl r1, r0, 8
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ldr r2, =0xF00FFF00
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* If used with the `mov` instruction, it results in a pure shift,
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* but the suffixes also exist for all the other data processing instructions.
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*
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* Here we illustrate a shifted add instruction which calculates:
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*
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* ....
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* r1 = r1 + (r0 << 1)
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* ....
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*/
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ldr r0, =0x10
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ldr r1, =0x100
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add r1, r1, r0, lsl 1
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ldr r2, =0x00000120
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LKMC_ASSERT_EQ_REG(r1, r2)
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/* The shift takes up the same encoding slot as the immediate,
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* therefore it is not possible to both use an immediate and shift.
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*
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* Error: shift expression expected -- `add r1,r0,1,lsl#1'
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*/
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#if 0
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add r1, r0, 1, lsl 1
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#endif
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/* However, you can still encode shifted bitmasks of
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* limited width in immediates, so why not just use the
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* assembler pre-processing for it?
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*/
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ldr r1, =0x100
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add r1, r1, (0x10 << 1)
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ldr r2, =0x00000120
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LKMC_ASSERT_EQ_REG(r1, r2)
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LKMC_EPILOGUE
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