mirror of
https://github.com/cirosantilli/linux-kernel-module-cheat.git
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c8c4f89854
Previously had wonky line pointer in asm_main. New interface simpler and more portable. Add tests for ASSERT_EQ_ and family in arm and aarch64, previously on x86_64. ASSERT_EQ_ and family in ARM can now either take =123, =addr or var, before this the = was added on macros so var was not possible. Define the main function directly in assembly, the C driver was useless.
72 lines
1.9 KiB
ArmAsm
72 lines
1.9 KiB
ArmAsm
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-vadd-instruction */
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#include <lkmc.h>
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.bss
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output: .skip 16
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LKMC_PROLOGUE
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/* Integer. */
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.data
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input0_u: .long 0xF1F1F1F1, 0xF2F2F2F2, 0xF3F3F3F3, 0xF4F4F4F4
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input1_u: .long 0x12121212, 0x13131313, 0x14141414, 0x15151515
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expect_u_32: .long 0x04040403, 0x06060605, 0x08080807, 0x0A0A0A09
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expect_u_64: .long 0x04040403, 0x06060606, 0x08080807, 0x0A0A0A0A
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.text
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#define TEST(size) \
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ldr r0, =input0_u; \
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vld1. ## size {q0}, [r0]; \
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ldr r0, =input1_u; \
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vld1. ## size {q1}, [r0]; \
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vadd.u ## size q2, q0, q1; \
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ldr r0, =output; \
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vst1.u ## size {q2}, [r0]; \
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LKMC_ASSERT_MEMCMP(output, expect_u_ ## size, =0x10)
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/* vadd.u32
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*
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* Add 4x 32-bit unsigned integers in one go.
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*
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* q means quad (128-bits)
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*
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* u32 means that we treat memory as uint32_t types.
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*
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* 4 is deduced: in 128 bits you can fit 4x u32.
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*/
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TEST(32)
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/* 2x 64-bit */
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TEST(64)
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#undef TEST
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/* Floating point. */
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.data
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input0_f_32: .float 1.5, 2.5, 3.5, 4.5
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input1_f_32: .float 5.5, 6.5, 7.5, 8.5
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expect_f_32: .float 7.0, 9.0, 11.0, 13.0
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input0_f_64: .double 1.5, 2.5
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input1_f_64: .double 5.5, 6.5
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expect_f_64: .double 7.0, 9.0
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.text
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#define TEST(size) \
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ldr r0, =input0_f_ ## size; \
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vld1. ## size {q0}, [r0]; \
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ldr r0, =input1_f_ ## size; \
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vld1. ## size {q1}, [r0]; \
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vadd.f ## size q2, q0, q1; \
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ldr r0, =output; \
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vst1. ## size {q2}, [r0]; \
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LKMC_ASSERT_MEMCMP(output, expect_f_ ## size, =0x10)
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/* 4x 32-bit. */
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TEST(32)
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#if 0
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/* vadd.f64: 2x 64-bit float add: appears not possible.
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* https://stackoverflow.com/questions/36052564/does-arm-support-simd-operations-for-64-bit-floating-point-numbers
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*
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* Fails with:
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* bad type in Neon instruction -- `vadd.f64 q2,q0,q1' */
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*/
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TEST(64)
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#endif
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#undef TEST
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LKMC_EPILOGUE
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