mirror of
https://github.com/cirosantilli/linux-kernel-module-cheat.git
synced 2026-01-26 03:31:36 +01:00
f176d04500
aarch64 basically done, but missing: - other archs - maybe convert main.c into C++ to use templates? - full review of ASSERT_EQ calling convention issues not seen by tests by chance - documentation
52 lines
1.1 KiB
ArmAsm
52 lines
1.1 KiB
ArmAsm
/* https://github.com/cirosantilli/arm-assembly-cheat#addressing-modes */
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#include "common.h"
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ENTRY
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/* Offset mode with immediate. Add 4 to the address register,
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* which ends up * reading myvar6 instead of myvar.
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*/
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adr r4, myvar
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ldr r5, [r4, 4]
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ASSERT_EQ(r5, 0x9ABCDEF0)
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/* r4 was not modified. */
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ASSERT_EQ(r4, myvar)
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/* Pre-indexed mode: modify register, then use it. */
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adr r4, myvar
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ldr r5, [r4, 4]!
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ASSERT_EQ(r5, 0x9ABCDEF0)
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/* r4 was modified. */
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ASSERT_EQ(r4, myvar6)
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/* Post-indexed mode: use register, then modify it. */
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adr r4, myvar
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ldr r5, [r4], 4
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ASSERT_EQ(r5, 0x12345678)
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/* r4 was modified. */
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ASSERT_EQ(r4, myvar6)
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/* Offset in register. */
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adr r4, myvar
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mov r5, 4
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ldr r6, [r4, r5]
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ASSERT_EQ(r6, 0x9ABCDEF0)
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/* Offset in shifted register:
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* r6 =
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* (r4 + (r5 << 1))
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* == *(myvar + (2 << 1))
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* == *(myvar + 4)
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*/
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adr r4, myvar
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mov r5, 2
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ldr r6, [r4, r5, lsl 1]
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ASSERT_EQ(r6, 0x9ABCDEF0)
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EXIT
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myvar:
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.word 0x12345678
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myvar6:
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.word 0x9ABCDEF0
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