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3b3f073e2c
ldxr_stxr does an ldxr on thread 0 to fall in the ISA case where event is certain. Also add ldxr_str which tests yet another case where event is certain: non conditional write.
11 lines
233 B
ArmAsm
11 lines
233 B
ArmAsm
/* https://cirosantilli.com/linux-kernel-module-cheat#benchmark-emulators-on-userland-executables */
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#define LKMC_M5OPS_ENABLE 1
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#include "lkmc/m5ops.h"
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.text
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.global _start
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_start:
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asm_main_after_prologue:
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LKMC_M5OPS_EXIT_ASM
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