mirror of
https://github.com/cirosantilli/linux-kernel-module-cheat.git
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80 lines
2.1 KiB
ArmAsm
80 lines
2.1 KiB
ArmAsm
/* https://cirosantilli.com/linux-kernel-module-cheat#assembly-registers */
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#include <lkmc.h>
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LKMC_PROLOGUE
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#if 0
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/* Unlike v7, we can't use PC like any other register in ARMv8,
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* since it is not a general purpose register anymore.
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*
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* Only branch instructions can modify the PC.
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*
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* B1.2.1 "Registers in AArch64 state" says:
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*
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* Software cannot write directly to the PC. It
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* can only be updated on a branch, exception entry or
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* exception return.
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*/
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ldr pc, =10f
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LKMC_ASSERT_FAIL
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10:
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#endif
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#if 0
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mov x0, pc
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#endif
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/* LDR PC-relative loads exist in ARMv8, but they have a separate encoding
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* "LDR (literal)" instead of "LDR (immediate)":
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* https://stackoverflow.com/questions/28638981/howto-write-pc-relative-adressing-on-arm-asm/54480999#54480999
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*/
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ldr x0, .Lpc_relative_ldr
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b 2f
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.Lpc_relative_ldr:
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.quad 0x123456789ABCDEF0
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2:
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LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0)
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/* Just for fun, we can also use relative numbers instead of labels.
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* https://reverseengineering.stackexchange.com/questions/17666/how-does-the-ldr-instruction-work-on-arm/20567#20567
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*/
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ldr x0, 0x8
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b 1f
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.quad 0x123456789ABCDEF0
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1:
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LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0)
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/* Analogous for b with PC. */
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mov x0, 0
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/* Jumps over mov to LKMC_ASSERT_EQ. */
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b 8
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mov x0, 1
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LKMC_ASSERT_EQ(x0, =0)
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/* Trying to use the old "LDR (immediate)" PC-relative
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* syntax does not work.
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*/
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#if 0
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/* 64-bit integer or SP register expected at operand 2 -- `ldr x0,[pc]' */
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ldr x0, [pc]
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#endif
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/* There is however no analogue for str. TODO rationale? */
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#if 0
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/* Error: invalid addressing mode at operand 2 -- `str x0,pc_relative_str' */
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str x0, pc_relative_str
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#endif
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/* You just have to use adr + "STR (register)". */
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ldr x0, pc_relative_str
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LKMC_ASSERT_EQ(x0, =0x0)
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adr x1, pc_relative_str
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ldr x0, .Lpc_relative_ldr
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str x0, [x1]
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ldr x0, pc_relative_str
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LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0)
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LKMC_EPILOGUE
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.data
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.align 4
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pc_relative_str:
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.quad 0x0000000000000000
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