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linux-kernel-module-cheat/gem5-event-queue-atomicsimplecpu-syscall-emulation-freestanding-example-analysis.html
Ciro Santilli 0a2a05fe28 8e6cdcb14b
2025-05-10 07:50:53 +01:00

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<title>Linux Kernel Module Cheat</title>
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</head>
<body id="gem5-event-queue-atomicsimplecpu-syscall-emulation-freestanding-example-analysis" class="article">
<div id="header">
<h1>Linux Kernel Module Cheat</h1>
</div>
<div id="content">
<div class="sect4">
<h5 id="gem5-event-queue-atomicsimplecpu-syscall-emulation-freestanding-example-analysis"><a class="anchor" href="#gem5-event-queue-atomicsimplecpu-syscall-emulation-freestanding-example-analysis"></a><a class="link" href="#gem5-event-queue-atomicsimplecpu-syscall-emulation-freestanding-example-analysis">24.22.4.1. gem5 event queue AtomicSimpleCPU syscall emulation freestanding example analysis</a></h5>
<div class="paragraph">
<p>Let&#8217;s now analyze every single event on a minimal <a href="gem5-syscall-emulation-mode.html">gem5 syscall emulation mode</a> in the <a href="gem5-cpu-types.html">simplest CPU that we have</a>:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>./run \
--arch aarch64 \
--emulator gem5 \
--userland userland/arch/aarch64/freestanding/linux/hello.S \
--trace Event,ExecAll,FmtFlag \
--trace-stdout \
;</pre>
</div>
</div>
<div class="paragraph">
<p>which gives:</p>
</div>
<div class="literalblock">
<div class="content">
<pre> 0: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 scheduled @ 0
**** REAL SIMULATION ****
0: Event: Event_70: generic 70 scheduled @ 0
info: Entering event queue @ 0. Starting simulation...
0: Event: Event_70: generic 70 rescheduled @ 18446744073709551615
0: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 0
0: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue : movz x0, #1, #0 : IntAlu : D=0x0000000000000001 flags=(IsInteger)
0: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 500
500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 500
500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+4 : adr x1, #28 : IntAlu : D=0x0000000000400098 flags=(IsInteger)
500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 1000
1000: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 1000
1000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+8 : ldr w2, #4194464 : MemRead : D=0x0000000000000006 A=0x4000a0 flags=(IsInteger|IsMemRef|IsLoad)
1000: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 1500
1500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 1500
1500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+12 : movz x8, #64, #0 : IntAlu : D=0x0000000000000040 flags=(IsInteger)
1500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 2000
2000: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 2000
2000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+16 : svc #0x0 : IntAlu : flags=(IsSerializeAfter|IsNonSpeculative|IsSyscall)
hello
2000: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 2500
2500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 2500
2500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+20 : movz x0, #0, #0 : IntAlu : D=0x0000000000000000 flags=(IsInteger)
2500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 3000
3000: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 3000
3000: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+24 : movz x8, #93, #0 : IntAlu : D=0x000000000000005d flags=(IsInteger)
3000: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 3500
3500: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 3500
3500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+28 : svc #0x0 : IntAlu : flags=(IsSerializeAfter|IsNonSpeculative|IsSyscall)
3500: Event: Event_71: generic 71 scheduled @ 3500
3500: Event: Event_71: generic 71 executed @ 3500</pre>
</div>
</div>
<div class="paragraph">
<p>On the event trace, we can first see:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>0: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 scheduled @ 0</pre>
</div>
</div>
<div class="paragraph">
<p>This schedules a tick event for time <code>0</code>, and leads to the first clock tick.</p>
</div>
<div class="paragraph">
<p>Then:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>0: Event: Event_70: generic 70 scheduled @ 0
0: Event: Event_70: generic 70 rescheduled @ 18446744073709551615</pre>
</div>
</div>
<div class="paragraph">
<p>schedules the end of time event for time <code>0</code>, which is later rescheduled to the actual end of time.</p>
</div>
<div class="paragraph">
<p>At:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>0: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 executed @ 0
0: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue : movz x0, #1, #0 : IntAlu : D=0x0000000000000001 flags=(IsInteger)
0: Event: AtomicSimpleCPU tick.wrapped_function_event: EventFunctionWrapped 39 rescheduled @ 500</pre>
</div>
</div>
<div class="paragraph">
<p>the tick event happens, the instruction runs, and then the instruction is rescheduled in <code>500</code> time units. This is done at the end of <code>AtomicSimpleCPU::tick()</code>:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>if (_status != Idle)
reschedule(tickEvent, curTick() + latency, true);</pre>
</div>
</div>
<div class="paragraph">
<p>At:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>3500: ExecEnable: system.cpu: A0 T0 : @asm_main_after_prologue+28 : svc #0x0 : IntAlu : flags=(IsSerializeAfter|IsNonSpeculative|IsSyscall)
3500: Event: Event_71: generic 71 scheduled @ 3500
3500: Event: Event_71: generic 71 executed @ 3500</pre>
</div>
</div>
<div class="paragraph">
<p>the exit system call is called, and then it schedules an exit evit, which gets executed and the simulation ends.</p>
</div>
<div class="paragraph">
<p>We guess then that <code>Event_71</code> comes from the SE implementation of the exit syscall, so let&#8217;s just confirm, the trace contains:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>exitSimLoop() at sim_events.cc:97 0x5555594746e0
exitImpl() at syscall_emul.cc:215 0x55555948c046
exitFunc() at syscall_emul.cc:225 0x55555948c147
SyscallDesc::doSyscall() at syscall_desc.cc:72 0x5555594949b6
Process::syscall() at process.cc:401 0x555559484717
SimpleThread::syscall() at 0x555559558059
ArmISA::SupervisorCall::invoke() at faults.cc:856 0x5555572950d7
BaseSimpleCPU::advancePC() at base.cc:681 0x555559083133
AtomicSimpleCPU::tick() at atomic.cc:757 0x55555907834c</pre>
</div>
</div>
<div class="paragraph">
<p>and <code>exitSimLoop()</code> does:</p>
</div>
<div class="literalblock">
<div class="content">
<pre>new GlobalSimLoopExitEvent(when + simQuantum, message, exit_code, repeat);</pre>
</div>
</div>
<div class="paragraph">
<p>Tested in gem5 12c917de54145d2d50260035ba7fa614e25317a3.</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="atomicsimplecpu-initial-events.html">AtomicSimpleCPU initial events</a></p>
</li>
<li>
<p><a href="atomicsimplecpu-tick-reschedule-timing.html">AtomicSimpleCPU tick reschedule timing</a></p>
</li>
<li>
<p><a href="atomicsimplecpu-memory-access.html">AtomicSimpleCPU memory access</a></p>
</li>
<li>
<p><a href="gem5-se-py-page-translation.html">gem5 se.py page translation</a></p>
</li>
</ul>
</div>
</div>
<div class="paragraph nav-footer">
<p> Up: <a href="gem5-event-queue.html">gem5 event queue</a> | ⌂ Home: <a href="README.html">Linux Kernel Module Cheat</a> | Next: <a href="atomicsimplecpu-initial-events.html">AtomicSimpleCPU initial events</a> →</p>
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