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https://github.com/cirosantilli/linux-kernel-module-cheat.git
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569 lines
35 KiB
HTML
569 lines
35 KiB
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<meta name="description" content="The perfect emulation setup to study and develop the <<linux-kernel>> v5.9.2, kernel modules, <<qemu-buildroot-setup,QEMU>>, <<gem5-buildroot-setup,gem5>> and x86_64, ARMv7 and ARMv8 <<userland-assembly,userland>> and <<baremetal-setup,baremetal>> assembly, <<c,ANSI C>>, <<cpp,C++>> and <<posix,POSIX>>. EVERYTHING is built from source. <<gdb>> and <<kgdb>> just work. Powered by <<about-the-qemu-buildroot-setup,Buildroot>> and <<about-the-baremetal-setup,crosstool-NG>>. Highly automated. Thoroughly documented. Automated <<test-this-repo,tests>>. "Tested" in an Ubuntu 20.04 host.">
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<title>Linux Kernel Module Cheat</title>
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</head>
|
||
<body id="arm64-secondary-cpu-entry-point" class="article">
|
||
<div id="header">
|
||
<h1>Linux Kernel Module Cheat</h1>
|
||
</div>
|
||
<div id="content">
|
||
<div class="sect4">
|
||
<h5 id="arm64-secondary-cpu-entry-point"><a class="anchor" href="#arm64-secondary-cpu-entry-point"></a><a class="link" href="#arm64-secondary-cpu-entry-point">3.5.1.1. arm64 secondary CPU entry point</a></h5>
|
||
<div class="paragraph">
|
||
<p>In gem5 aarch64 Linux v4.18, experimentally the entry point of secondary CPUs seems to be <code>secondary_holding_pen</code> as shown at <a href="https://gist.github.com/cirosantilli2/34a7bc450fcb6c1c1a910369be1fdd90" class="bare">https://gist.github.com/cirosantilli2/34a7bc450fcb6c1c1a910369be1fdd90</a></p>
|
||
</div>
|
||
<div class="paragraph">
|
||
<p>What happens is that:</p>
|
||
</div>
|
||
<div class="ulist">
|
||
<ul>
|
||
<li>
|
||
<p>the bootloader goes in in WFE</p>
|
||
</li>
|
||
<li>
|
||
<p>the kernel writes the entry point to the secondary CPU (the address of <code>secondary_holding_pen</code>) with CPU0 at the address given to the kernel in the <code>cpu-release-addr</code> of the DTB</p>
|
||
</li>
|
||
<li>
|
||
<p>the kernel wakes up the bootloader with a SEV, and the bootloader boots to the address the kernel told it</p>
|
||
</li>
|
||
</ul>
|
||
</div>
|
||
<div class="paragraph">
|
||
<p>The CPU0 action happens at: <a href="https://github.com/cirosantilli/linux/blob/v5.7/arch/arm64/kernel/smp_spin_table.c" class="bare">https://github.com/cirosantilli/linux/blob/v5.7/arch/arm64/kernel/smp_spin_table.c</a>:</p>
|
||
</div>
|
||
<div class="paragraph">
|
||
<p>Here’s the code that writes the address and does SEV:</p>
|
||
</div>
|
||
<div class="literalblock">
|
||
<div class="content">
|
||
<pre>static int smp_spin_table_cpu_prepare(unsigned int cpu)
|
||
{
|
||
__le64 __iomem *release_addr;
|
||
|
||
if (!cpu_release_addr[cpu])
|
||
return -ENODEV;
|
||
|
||
/*
|
||
* The cpu-release-addr may or may not be inside the linear mapping.
|
||
* As ioremap_cache will either give us a new mapping or reuse the
|
||
* existing linear mapping, we can use it to cover both cases. In
|
||
* either case the memory will be MT_NORMAL.
|
||
*/
|
||
release_addr = ioremap_cache(cpu_release_addr[cpu],
|
||
sizeof(*release_addr));
|
||
if (!release_addr)
|
||
return -ENOMEM;
|
||
|
||
/*
|
||
* We write the release address as LE regardless of the native
|
||
* endianess of the kernel. Therefore, any boot-loaders that
|
||
* read this address need to convert this address to the
|
||
* boot-loader's endianess before jumping. This is mandated by
|
||
* the boot protocol.
|
||
*/
|
||
writeq_relaxed(__pa_symbol(secondary_holding_pen), release_addr);
|
||
__flush_dcache_area((__force void *)release_addr,
|
||
sizeof(*release_addr));
|
||
|
||
/*
|
||
* Send an event to wake up the secondary CPU.
|
||
*/
|
||
sev();</pre>
|
||
</div>
|
||
</div>
|
||
<div class="paragraph">
|
||
<p>and here’s the code that reads the value from the DTB:</p>
|
||
</div>
|
||
<div class="literalblock">
|
||
<div class="content">
|
||
<pre>static int smp_spin_table_cpu_init(unsigned int cpu)
|
||
{
|
||
struct device_node *dn;
|
||
int ret;
|
||
|
||
dn = of_get_cpu_node(cpu, NULL);
|
||
if (!dn)
|
||
return -ENODEV;
|
||
|
||
/*
|
||
* Determine the address from which the CPU is polling.
|
||
*/
|
||
ret = of_property_read_u64(dn, "cpu-release-addr",
|
||
&cpu_release_addr[cpu]);</pre>
|
||
</div>
|
||
</div>
|
||
<div class="ulist">
|
||
<ul>
|
||
</ul>
|
||
</div>
|
||
</div>
|
||
<div class="paragraph nav-footer">
|
||
<p>↑ Up: <a href="linux-kernel-entry-point.html">Linux kernel entry point</a> | ⌂ Home: <a href="README.html">Linux Kernel Module Cheat</a> | Next: <a href="linux-kernel-arch-agnostic-entry-point.html">Linux kernel arch-agnostic entry point</a> →</p>
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