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linux-kernel-module-cheat/arm-mov-instruction.html
Ciro Santilli 0a2a05fe28 8e6cdcb14b
2025-05-10 07:50:53 +01:00

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<meta name="description" content="The perfect emulation setup to study and develop the &lt;&lt;linux-kernel&gt;&gt; v5.9.2, kernel modules, &lt;&lt;qemu-buildroot-setup,QEMU&gt;&gt;, &lt;&lt;gem5-buildroot-setup,gem5&gt;&gt; and x86_64, ARMv7 and ARMv8 &lt;&lt;userland-assembly,userland&gt;&gt; and &lt;&lt;baremetal-setup,baremetal&gt;&gt; assembly, &lt;&lt;c,ANSI C&gt;&gt;, &lt;&lt;cpp,C++&gt;&gt; and &lt;&lt;posix,POSIX&gt;&gt;. EVERYTHING is built from source. &lt;&lt;gdb&gt;&gt; and &lt;&lt;kgdb&gt;&gt; just work. Powered by &lt;&lt;about-the-qemu-buildroot-setup,Buildroot&gt;&gt; and &lt;&lt;about-the-baremetal-setup,crosstool-NG&gt;&gt;. Highly automated. Thoroughly documented. Automated &lt;&lt;test-this-repo,tests&gt;&gt;. "Tested" in an Ubuntu 20.04 host.">
<title>Linux Kernel Module Cheat</title>
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</head>
<body id="arm-mov-instruction" class="article">
<div id="header">
<h1>Linux Kernel Module Cheat</h1>
</div>
<div id="content">
<div class="sect3">
<h4 id="arm-mov-instruction"><a class="anchor" href="#arm-mov-instruction"></a><a class="link" href="#arm-mov-instruction">30.4.3. ARM MOV instruction</a></h4>
<div class="paragraph">
<p>Move an immediate to a register, or a register to another register.</p>
</div>
<div class="paragraph">
<p>Cannot load from or to memory, since only the LDR and STR instruction families can do that in ARM as mentioned at: <a href="arm-load-and-store-instructions.html">Section 30.3, &#8220;ARM load and store instructions&#8221;</a>.</p>
</div>
<div class="paragraph">
<p>Example: <a href="https://github.com/cirosantilli/linux-kernel-module-cheat/blob/master/userland/arch/arm/mov.S">userland/arch/arm/mov.S</a></p>
</div>
<div class="paragraph">
<p>Since every instruction <a href="arm-instruction-encodings.html">has a fixed 4 byte size</a>, there is not enough space to encode arbitrary 32-bit immediates in a single instruction, since some of the bits are needed to actually encode the instruction itself.</p>
</div>
<div class="paragraph">
<p>The solutions to this problem are mentioned at:</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="https://stackoverflow.com/questions/38689886/loading-32-bit-values-to-a-register-in-arm-assembly" class="bare">https://stackoverflow.com/questions/38689886/loading-32-bit-values-to-a-register-in-arm-assembly</a></p>
</li>
<li>
<p><a href="https://community.arm.com/processors/b/blog/posts/how-to-load-constants-in-assembly-for-arm-architecture" class="bare">https://community.arm.com/processors/b/blog/posts/how-to-load-constants-in-assembly-for-arm-architecture</a></p>
</li>
</ul>
</div>
<div class="paragraph">
<p>Summary of solutions:</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="arm-movw-and-movt-instructions.html">ARM movw and movt instructions</a></p>
</li>
<li>
<p>place it in memory. But then how to load the address, which is also a 32-bit value?</p>
<div class="ulist">
<ul>
<li>
<p>use pc-relative addressing if the memory is close enough</p>
</li>
<li>
<p>use <a href="arm-bitwise-instructions.html">ORR</a> encodable shifted immediates</p>
</li>
</ul>
</div>
</li>
</ul>
</div>
<div class="paragraph">
<p>The blog article summarizes nicely which immediates can be encoded and the design rationale:</p>
</div>
<div class="quoteblock">
<blockquote>
<div class="paragraph">
<p>An Operand 2 immediate must obey the following rule to fit in the instruction: an 8-bit value rotated right by an even number of bits between 0 and 30 (inclusive). This allows for constants such as 0xFF (0xFF rotated right by 0), 0xFF00 (0xFF rotated right by 24) or 0xF000000F (0xFF rotated right by 4).</p>
</div>
<div class="paragraph">
<p>In software - especially in languages like C - constants tend to be small. When they are not small they tend to be bit masks. Operand 2 immediates provide a reasonable compromise between constant coverage and encoding space; most common constants can be encoded directly.</p>
</div>
</blockquote>
</div>
<div class="paragraph">
<p>Assemblers however support magic memory allocations which may hide what is truly going on: <a href="https://stackoverflow.com/questions/14046686/why-use-ldr-over-mov-or-vice-versa-in-arm-assembly" class="bare">https://stackoverflow.com/questions/14046686/why-use-ldr-over-mov-or-vice-versa-in-arm-assembly</a> Always ask your friendly disassembly for a good confirmation.</p>
</div>
<div class="ulist">
<ul>
<li>
<p><a href="arm-movw-and-movt-instructions.html">ARM movw and movt instructions</a></p>
</li>
<li>
<p><a href="armv8-aarch64-movk-instruction.html">ARMv8 aarch64 movk instruction</a></p>
</li>
<li>
<p><a href="armv8-aarch64-movn-instruction.html">ARMv8 aarch64 movn instruction</a></p>
</li>
</ul>
</div>
</div>
<div class="paragraph nav-footer">
<p> Previous: <a href="arm-bfi-instruction.html">ARM BFI instruction</a> | ↑ Up: <a href="arm-data-processing-instructions.html">ARM data processing instructions</a> | ⌂ Home: <a href="README.html">Linux Kernel Module Cheat</a> | Next: <a href="arm-movw-and-movt-instructions.html">ARM movw and movt instructions</a> →</p>
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