baremetal aarch64: create C version of multicore.S as well

Attempted to do the same for arm, but it failed.

baremetal/arch/aarch64/multicore.c

@@ -0,0 +1,45 @@
+/* https://cirosantilli.com/linux-kernel-module-cheat#arm-multicore
+ *
+ * Beware: things will blow up if the stack for CPU0 grow too much and
+ * reaches that of CPU1. This is why it is so hard to do multithreading
+ * without an OS that manages paging.
+ */
+
+#include <lkmc.h>
+
+uint64_t spinlock = 0;
+
+__asm__(
+".text\n"
+".global lkmc_cpu_not_0\n"
+"lkmc_cpu_not_0:\n"
+/* Put all CPUs except CPU1 to sleep. */
+"    cmp x0, 1\n"
+"    bne .Lsleep_forever\n"
+/* Prepare the stack for CPU1. This is what we need
+ * this assembly function for. */
+"    ldr x0, =(stack_top - 0x1000)\n"
+"    mov sp, x0\n"
+"    bl main_cpu1\n"
+".Lsleep_forever:\n"
+"    wfe\n"
+"    b .Lsleep_forever\n"
+);
+
+static void main_cpu1(void) {
+    spinlock = 1;
+    lkmc_arm_aarch64_dmb(sy);
+    lkmc_arm_aarch64_sev();
+    while (1) {
+        lkmc_arm_aarch64_wfe();
+    }
+}
+
+int main(void) {
+#if !LKMC_GEM5
+    lkmc_aarch64_psci_cpu_on(1, (uint64_t)main_cpu1, 0);
+#endif
+    while (!spinlock) {
+        lkmc_arm_aarch64_wfe();
+    }
+}

baremetal/arch/aarch64/no_bootloader/exit.S

@@ -0,0 +1,8 @@
+/* Test _exit. */
+
+#include <lkmc.h>
+
+.global lkmc_start
+lkmc_start:
+    mov x0, 0
+    bl _exit

baremetal/arch/aarch64/no_bootloader/multicore_asm.S

@@ -1,11 +1,15 @@
-/* https://cirosantilli.com/linux-kernel-module-cheat#arm-multicore */
+/* https://cirosantilli.com/linux-kernel-module-cheat#arm-multicore
+ *
+ * This has to be in no_bootloader
+ */
 
 #include <lkmc.h>
 
-LKMC_PROLOGUE
+.global lkmc_start
+lkmc_start:
     /* Reset spinlock. */
     mov x0, 0
-    ldr x1, =spinlock
+    ldr x1, =.Lspinlock
     str x0, [x1]
 
     /* Read cpu id into x1.
@@ -14,11 +18,11 @@ LKMC_PROLOGUE
      */
     mrs x1, mpidr_el1
     ands x1, x1, 3
-    beq cpu0_only
+    beq .Lcpu0_only
 .Lcpu1_only:
     /* Only CPU 1 reaches this point and sets the spinlock. */
     mov x0, 1
-    ldr x1, =spinlock
+    ldr x1, =.Lspinlock
     str x0, [x1]
     /* Ensure that CPU 0 sees the write right now.
      * Optional, but could save some useless CPU 1 loops.
@@ -34,7 +38,7 @@ LKMC_PROLOGUE
      */
     wfe
     b .Lcpu1_sleep_forever
-cpu0_only:
+.Lcpu0_only:
     /* Only CPU 0 reaches this point. */
 
 #if !LKMC_GEM5
@@ -61,11 +65,14 @@ cpu0_only:
     hvc 0
 #endif
 
-spinlock_start:
-    ldr x0, spinlock
+.Lspinlock_start:
+    ldr x0, .Lspinlock
     /* Hint CPU 0 to enter low power mode. */
     wfe
-    cbz x0, spinlock_start
-LKMC_EPILOGUE
-spinlock:
+    cbz x0, .Lspinlock_start
+
+    mov x0, 0
+    bl _exit
+
+.Lspinlock:
     .skip 8

baremetal/arch/aarch64/no_bootloader/semihost_exit.S

@@ -1,15 +1,19 @@
-/* https://cirosantilli.com/linux-kernel-module-cheat#semihosting */
+/* https://cirosantilli.com/linux-kernel-module-cheat#semihosting
+ *
+ * Since our stack pointer is not setup, we justa allocate a memory
+ * region to contain the semihosting arguments, which must be in memory.
+ */
 
 .global lkmc_start
 lkmc_start:
     mov x1, 0x26
     movk x1, 2, lsl 16
-    ldr x2, =semihost_args
+    ldr x2, =.Lsemihost_args
     str x1, [x2, 0]
     mov x0, 0
     str x0, [x2, 8]
     mov x1, x2
     mov w0, 0x18
     hlt 0xf000
-semihost_args:
+.Lsemihost_args:
     .skip 16

baremetal/arch/aarch64/semihost_exit.S

@@ -1,3 +1,5 @@
+/* https://cirosantilli.com/linux-kernel-module-cheat#semihosting */
+
 .global main
 main:
     /* 0x20026 == ADP_Stopped_ApplicationExit */

baremetal/arch/aarch64/svc.c

@@ -71,7 +71,7 @@ int main(void) {
     printf("&after_svc %p\n", &&after_svc);
     assert(myvar == 0);
     /* Max 16-bits. */
-    lkmc_svc(0xABCD);
+    lkmc_arm_aarch64_svc(0xABCD);
 after_svc:
     assert(myvar == 1);
     return 0;

baremetal/arch/aarch64/timer.c

@@ -113,7 +113,7 @@ int main(void) {
         enable_irq();
     }
     while (1) {
-        lkmc_wfi();
+        lkmc_arm_aarch64_wfi();
     }
     return 0;
 }