failed xen attempt, refactor timer, failed svc attempt, aarch64 use gicv3

This commit is contained in:
Ciro Santilli 六四事件 法轮功
2019-01-22 00:00:00 +00:00
parent 7db96f405a
commit e51ec2aca9
10 changed files with 125 additions and 35 deletions

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@@ -0,0 +1,24 @@
#ifndef COMMON_AARCH64_H
#define COMMON_AARCH64_H
#include <inttypes.h>
#define SYSREG_READ(type, name) \
type sysreg_ ## name ## _read(void) { \
type name; \
__asm__ __volatile__("mrs %0, " #name : "=r" (name) : : ); \
return name; \
}
#define SYSREG_WRITE(type, name) \
void sysreg_ ## name ## _write(type name) { \
__asm__ __volatile__("msr " #name ", %0" : : "r" (name) : ); \
}
#define SYSREG_READ_WRITE(name, type) \
SYSREG_READ(name, type) \
SYSREG_WRITE(name, type)
#define SVC(immediate) __asm__ __volatile__("svc " #immediate : : : )
#endif

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@@ -0,0 +1,28 @@
#include <stdio.h>
#include <inttypes.h>
#include "common_aarch64.h"
/* Masks each of the 4 exception types: Synchronous, System error,
* IRQ and FIQ.
*/
SYSREG_READ_WRITE(uint32_t, daif)
/* Determines if we use SP0 or SPx. Default: SP0.
* See also: https://stackoverflow.com/questions/29393677/armv8-exception-vector-significance-of-el0-sp
*/
SYSREG_READ_WRITE(uint32_t, spsel)
/* Jump to this SP if spsel == SPx. */
SYSREG_READ_WRITE(uint64_t, sp_el1)
int main(void) {
printf("daif 0x%" PRIx32 "\n", sysreg_daif_read());
printf("spsel 0x%" PRIx32 "\n", sysreg_spsel_read());
/* TODO this breaks execution because reading system registers that end
* in ELx "trap", leading into an exception on the upper EL.
*/
/*printf("sp_el1 0x%" PRIx64 "\n", sysreg_sp_el1_read());*/
/*SVC(0);*/
return 0;
}

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@@ -1,28 +1,12 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-level */
#include <stdio.h>
#include <inttypes.h>
#include "common_aarch64.h"
#define CNTV_CTL_ENABLE (1 << 0)
#define CNTV_CTL_IMASK (1 << 1)
#define CNTV_CTL_ISTATUS (1 << 2)
#define SYSREG_READ(type, name) \
type name ## _read(void) { \
type name; \
__asm__ __volatile__("mrs %0, " #name : "=r" (name) : : ); \
return name; \
}
#define SYSREG_WRITE(type, name) \
void name ## _write(type name) { \
__asm__ __volatile__("msr " #name ", %0" : : "r" (name) : ); \
}
#define SYSREG_READ_WRITE(name, type) \
SYSREG_READ(name, type) \
SYSREG_WRITE(name, type)
/* Frequency in Hz. ? */
SYSREG_READ_WRITE(uint64_t, cntfrq_el0)
@@ -41,7 +25,7 @@ SYSREG_READ_WRITE(uint64_t, cntv_tval_el0)
SYSREG_READ_WRITE(uint32_t, cntv_ctl_el0)
void cntv_ctl_el0_disable(void) {
cntv_ctl_el0_write(cntv_ctl_el0_read() & ~CNTV_CTL_ENABLE);
sysreg_cntv_ctl_el0_write(sysreg_cntv_ctl_el0_read() & ~CNTV_CTL_ENABLE);
}
/* If enabled, when: cntv_ctl > cntv_cval then:
@@ -50,25 +34,25 @@ void cntv_ctl_el0_disable(void) {
* * set CNTV_CTL_ISTATUS
*/
void cntv_ctl_el0_enable(void) {
cntv_ctl_el0_write(cntv_ctl_el0_read() | CNTV_CTL_ENABLE);
sysreg_cntv_ctl_el0_write(sysreg_cntv_ctl_el0_read() | CNTV_CTL_ENABLE);
}
int main(void) {
/* Initial state. */
printf("cntv_ctl_el0 0x%" PRIx32 "\n", cntv_ctl_el0_read());
printf("cntfrq_el0 0x%" PRIx64 "\n", cntfrq_el0_read());
printf("cntv_cval_el0 0x%" PRIx64 "\n", cntv_cval_el0_read());
printf("cntv_ctl_el0 0x%" PRIx32 "\n", sysreg_cntv_ctl_el0_read());
printf("cntfrq_el0 0x%" PRIx64 "\n", sysreg_cntfrq_el0_read());
printf("cntv_cval_el0 0x%" PRIx64 "\n", sysreg_cntv_cval_el0_read());
/* Get the counter value many times to watch the time pass. */
printf("cntvct_el0 0x%" PRIx64 "\n", cntvct_el0_read());
printf("cntvct_el0 0x%" PRIx64 "\n", cntvct_el0_read());
printf("cntvct_el0 0x%" PRIx64 "\n", cntvct_el0_read());
printf("cntvct_el0 0x%" PRIx64 "\n", sysreg_cntvct_el0_read());
printf("cntvct_el0 0x%" PRIx64 "\n", sysreg_cntvct_el0_read());
printf("cntvct_el0 0x%" PRIx64 "\n", sysreg_cntvct_el0_read());
#if 0
/* TODO crashes gem5. */
puts("cntfrq_el0 = 1");
cntfrq_el0_write(1);
printf("cntfrq_el0 0x%" PRIx64 "\n", cntfrq_el0_read());
sysreg_cntfrq_el0_write(1);
printf("cntfrq_el0 0x%" PRIx64 "\n", sysreg_cntfrq_el0_read());
#endif
return 0;