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https://github.com/cirosantilli/linux-kernel-module-cheat.git
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learn more formally arm 32 bit CP registers, fix QEMU baremetal run with cli args
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@@ -10,6 +10,35 @@ int main(void) {
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/* https://cirosantilli.com/linux-kernel-module-cheat#arm-exception-levels */
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printf("SPSR.M 0x%" PRIX32 "\n", spsr & 0xF);
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/* CP14 https://cirosantilli.com/linux-kernel-module-cheat#arm-system-register-instructions */
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uint32_t dbgdidr;
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__asm__ ("mrc p14, 0, %0, c0, c0, 0" : "=r" (dbgdidr) : :);
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printf("DBGDIDR 0x%" PRIX32 "\n", dbgdidr);
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#if !LKMC_GEM5
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uint32_t dbgdrar_0;
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uint32_t dbgdrar_1;
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__asm__ ("mrrc p14, 0, %0, %1, c1" : "=r" (dbgdrar_0), "=r" (dbgdrar_1) : :);
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printf("DBGDRAR 0x%" PRIX64 "\n", dbgdrar_0 | ((uint64_t)dbgdrar_1 << 32));
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#endif
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/* CP15 https://cirosantilli.com/linux-kernel-module-cheat#arm-system-register-instructions */
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uint32_t midr;
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__asm__ ("mrc p15, 0, %0, c0, c0, 0" : "=r" (midr) : :);
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printf("MIDR 0x%" PRIX32 "\n", midr);
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printf("MIDR.Architecture 0x%" PRIX32 "\n", (midr >> 16) & 0xF);
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uint32_t ctr;
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__asm__ ("mrc p15, 0, %0, c0, c0, 0" : "=r" (ctr) : :);
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printf("CTR 0x%" PRIX32 "\n", ctr);
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uint32_t ttbr0_0;
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uint32_t ttbr0_1;
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__asm__ ("mrrc p15, 0, %0, %1, c2" : "=r" (ttbr0_0), "=r" (ttbr0_1) : :);
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printf("TTBR0 0x%" PRIX64 "\n", ttbr0_0 | ((uint64_t)ttbr0_1 << 32));
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#if 0
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/* TODO blows up exception in EL, but works with -machine secure=on. */
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uint32_t nsacr;
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