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gem5: fix arm multicore with system.auto_reset_addr = True

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baremetal: fix aarch64/no_bootloader/semihost_exit.S which was wrong
because was using unset sp for register block. Tests needed urgently!!
This commit is contained in:
Ciro Santilli 六四事件 法轮功
2018-11-25 00:00:00 +00:00
parent 5b6a716a9b
commit ba2976cc7f
9 changed files with 180 additions and 36 deletions
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11
baremetal/arch/aarch64/multicore.S
View File

@@ -7,10 +7,12 @@ main:
ldr x1, =spinlock
str x0, [x1]
/* Read cpu id into x1. */
/* Read cpu id into x1.
* TODO: cores beyond 4th?
*/
mrs x1, mpidr_el1
and x1, x1, 3
cbz x1, cpu0_only
ands x1, x1, 3
beq cpu0_only
cpu1_only:
/* Only CPU 1 reaches this point and sets the spinlock. */
mov x0, 1
@@ -35,8 +37,7 @@ cpu0_only:
#if !defined(GEM5)
/* Wake up CPU 1 from initial sleep!
* In gem5, CPU 1 starts woken up from the start,
* so this is not needed.
* See:https://github.com/cirosantilli/linux-kernel-module-cheat#psci
*/
/* Function identifier: PCSI CPU_ON. */
ldr w0, =0xc4000003

15
baremetal/arch/aarch64/no_bootloader/semihost_exit.S
View File

@@ -2,11 +2,14 @@
.global mystart
mystart:
mov x1, #0x26
movk x1, #2, lsl #16
str x1, [sp,#0]
mov x1, 0x26
movk x1, 2, lsl 16
ldr x2, =semihost_args
str x1, [x2, 0]
mov x0, #0
str x0, [sp,#8]
mov x1, sp
mov w0, #0x18
str x0, [x2, 8]
mov x1, x2
mov w0, 0x18
hlt 0xf000
semihost_args:
.skip 16

15
baremetal/arch/aarch64/semihost_exit.S
View File

@@ -1,20 +1,21 @@
.global main
main:
/* 0x20026 == ADP_Stopped_ApplicationExit */
mov x1, #0x26
movk x1, #2, lsl #16
str x1, [sp,#0]
mov x1, 0x26
movk x1, 2, lsl 16
str x1, [sp, 0]
/* Exit status code. Host QEMU process exits with that status. */
mov x0, #0
str x0, [sp,#8]
mov x0, 0
str x0, [sp, 8]
/* x1 contains the address of parameter block.
* Any memory address could be used. */
* Any memory address could be used.
*/
mov x1, sp
/* SYS_EXIT */
mov w0, #0x18
mov w0, 0x18
/* Do the semihosting call on A64. */
hlt 0xf000