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userland: attempt to fix all assembly example links to README
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Ciro Santilli 六四事件 法轮功
39
README.adoc
39
README.adoc
@@ -9,7 +9,7 @@
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:toclevels: 6
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:toc-title:
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The perfect emulation setup to study and develop the <<linux-kernel>> v5.0, kernel modules, <<qemu-buildroot-setup,QEMU>> and x86_64, ARMv7 and ARMv8 <<userland-assembly,userland>> and <<baremetal-setup,baremetal>> assembly. <<gdb>> and <<kgdb>> just work. Powered by <<about-the-qemu-buildroot-setup,Buildroot>> and <<about-the-baremetal-setup,crosstool-NG>>. Highly automated. Thoroughly documented. Automated <<test-this-repo,tests>>. "Tested" in an Ubuntu 18.04 host.
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The perfect emulation setup to study and develop the <<linux-kernel>> v5.0, kernel modules, <<qemu-buildroot-setup,QEMU>>, <<gem5-buildroot-setup,gem5>> and x86_64, ARMv7 and ARMv8 <<userland-assembly,userland>> and <<baremetal-setup,baremetal>> assembly. <<gdb>> and <<kgdb>> just work. Powered by <<about-the-qemu-buildroot-setup,Buildroot>> and <<about-the-baremetal-setup,crosstool-NG>>. Highly automated. Thoroughly documented. Automated <<test-this-repo,tests>>. "Tested" in an Ubuntu 18.04 host.
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TL;DR: <<qemu-buildroot-setup-getting-started>>
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@@ -373,7 +373,7 @@ Have you ever felt that a single `inc` instruction was not enough? Really? Me to
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So let's hack the <<gnu-gas-assembler>>, which is part of link:https://en.wikipedia.org/wiki/GNU_Binutils[GNU Binutils], to add a new shiny version of `inc` called... `myinc`!
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GCC uses GNU GAS as its backend, so we will test out new mnemonic with an inline assembly test program: link:userland/arch/x86_64/binutils_hack.c[], which is just a copy of link:userland/arch/x86_64/asm_hello.c[] but with `myinc` instead of `inc`.
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GCC uses GNU GAS as its backend, so we will test out new mnemonic with an <<gcc-inline-assembly>> test program: link:userland/arch/x86_64/binutils_hack.c[], which is just a copy of link:userland/arch/x86_64/asm_hello.c[] but with `myinc` instead of `inc`.
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The inline assembly is disabled with an `#ifdef`, so first modify the source to enable that.
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@@ -955,7 +955,7 @@ Notable userland content included / moving into this repository includes:
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* <<c>>
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* <<cpp>>
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* <<posix>>
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* https://github.com/cirosantilli/algorithm-cheat will be good to move here for performance analysis
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* https://github.com/cirosantilli/algorithm-cheat TODO will be good to move here for performance analysis <<gem5-run-benchmark,with gem5>>
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==== Userland setup getting started
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@@ -11685,7 +11685,7 @@ corresponding register field is interpreted as returning zero when read or disca
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When instructions do not interpret this operand encoding as the zero register, use of the name XZR is an error
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____
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=== Assembly SIMD
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=== SIMD assembly
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Much like ADD for non-SIMD, start learning SIMD instructions by looking at the integer and floating point SIMD ADD instructions of each ISA:
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@@ -11980,7 +11980,7 @@ Some of the differences include:
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When reading disassembly, many instructions have either a `.n` or `.w` suffix.
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`.n` means narrow, and stands for the Thumb encoding of an instructions, while `.w` means wide and stands for the ARM encoding.
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`.n` means narrow, and stands for the <<arm-instruction-encodings,Thumb encoding>> of an instructions, while `.w` means wide and stands for the ARM encoding.
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Bibliography: https://stackoverflow.com/questions/27147043/n-suffix-to-branch-instruction
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@@ -12145,7 +12145,7 @@ Understanding the basics of instruction encodings is fundamental to help you to
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aarch32 has two "instruction sets", which to look just like encodings.
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Some control bit determines which one we are currently on, and userland can switch between them with the <<arm-bx-instruction>>.
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Some control bit must determine which one we are currently on, and userland can switch between them with the <<arm-bx-instruction>> TODO: details.
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The encodings are:
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@@ -12154,6 +12154,8 @@ The encodings are:
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+
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T stands for "Thumb", which is the original name for the technology. The word "Thumb" does not appear on <<armarm8>> however. It does appear on <<armarm7>> though.
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+
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Example: link:userland/arch/arm/thumb.S[]
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+
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See also: <<armarm8>> F2.1.3 "Instruction encodings".
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Within each instruction set, there can be multiple encodings for a given function, and they are noted simply as:
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@@ -12188,7 +12190,10 @@ TODO: what to do if we want to jump longer than that?
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Branch if equal based on the status registers.
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Example: link:userland/arch/arm/beq.S[].
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Examples:
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* link:userland/arch/arm/beq.S[].
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* link:userland/arch/aarch64/beq.S[].
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The family of instructions includes:
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@@ -12217,13 +12222,13 @@ The current ARM / Thumb mode is encoded in the least significant bit of lr.
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Since `bl` encodes the current ARM / Thumb in the register, `bx` keeps the mode unchanged by default.
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===== ARM ret instruction
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===== ARMv8 aarch64 ret instruction
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Example: link:userland/arch/aarch64/ret.S[]
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In ARMv8 aarch64:
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ARMv8 AArch64 only:
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* there is no `bx` since no Thumb to worry about, so it is called just `br`
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* there is no `bx` in AArch64 since no Thumb to worry about, so it is called just `br`
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* the `ret` instruction was added in addition to `br`, with the following differences:
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** provides a hint that this is a function call return
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** has a default argument `x30` if none is given. This is where `bl` puts the return value.
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@@ -12388,8 +12393,6 @@ AArch64 loses those instructions, likely because it was not possible anymore to
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Arithmetic:
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* link:userland/arch/arm/add.S[]. We use this simple instruction to explain syntax common to most data processing instructions, so have a good look at that file.
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** link:userland/arch/aarch64/add.S[]
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* link:userland/arch/arm/mul.S[]: multiply
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* link:userland/arch/arm/sub.S[]: subtract
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* link:userland/arch/arm/rbit.S[]: reverse bit order
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@@ -12589,6 +12592,18 @@ Bibliography: https://stackoverflow.com/questions/1875491/nop-for-iphone-binarie
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=== ARM SIMD
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==== ARM fadd vs vadd
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It is very confusing, but `fadds` and `faddd` in Aarch32 are <<gnu-gas-assembler-arm-unified-syntax,pre-UAL>> for `vadd.f32` and `vadd.f64`.
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The same goes for most ARMv7 mnemonics: `f*` is old, and `v*` is the newer better syntax.
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But then, in ARMv8, they decided to use `fadd` as the main floating point add name, and get rid of `vadd`!
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Also keep in mind that fused multiply add is `fmadd`.
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Examples at: <<simd-assembly>>
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==== ARM SIMD instructions
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===== ARM vcvt instruction
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