From b3874cc72b6424f2af950c5b11eb64dbf56cef37 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ciro=20Santilli=20=E5=85=AD=E5=9B=9B=E4=BA=8B=E4=BB=B6=20?= =?UTF-8?q?=E6=B3=95=E8=BD=AE=E5=8A=9F?= Date: Sun, 16 Jun 2019 00:00:01 +0000 Subject: [PATCH] asm: make all text section labels .L local To help with backtraces if we ever fix them due to the lkmc_asm_main_after_prologue debacle. --- baremetal/arch/aarch64/multicore.S | 8 ++++---- baremetal/arch/arm/multicore.S | 8 ++++---- userland/arch/aarch64/adr.S | 1 - userland/arch/aarch64/adrp.S | 6 +++--- userland/arch/aarch64/cbz.S | 9 ++++----- userland/arch/aarch64/movk.S | 10 +++++----- userland/arch/aarch64/pc.S | 10 +++++----- userland/arch/arm/adr.S | 8 ++++---- userland/arch/arm/b.S | 4 ++-- userland/arch/arm/registers.S | 1 - userland/arch/arm/str.S | 4 ++-- userland/arch/x86_64/jmp.S | 4 ++-- userland/arch/x86_64/jmp_indirect.S | 8 ++++---- userland/arch/x86_64/loop.S | 8 ++++---- 14 files changed, 43 insertions(+), 46 deletions(-) diff --git a/baremetal/arch/aarch64/multicore.S b/baremetal/arch/aarch64/multicore.S index 1bbba90..8f9e680 100644 --- a/baremetal/arch/aarch64/multicore.S +++ b/baremetal/arch/aarch64/multicore.S @@ -15,7 +15,7 @@ LKMC_PROLOGUE mrs x1, mpidr_el1 ands x1, x1, 3 beq cpu0_only -cpu1_only: +.Lcpu1_only: /* Only CPU 1 reaches this point and sets the spinlock. */ mov x0, 1 ldr x1, =spinlock @@ -28,12 +28,12 @@ cpu1_only: * Optional, but could save power on a real system. */ sev -cpu1_sleep_forever: +.Lcpu1_sleep_forever: /* Hint CPU 1 to enter low power mode. * Optional, but could save power on a real system. */ wfe - b cpu1_sleep_forever + b .Lcpu1_sleep_forever cpu0_only: /* Only CPU 0 reaches this point. */ @@ -46,7 +46,7 @@ cpu0_only: /* Argument 1: target_cpu */ mov x1, 1 /* Argument 2: entry_point_address */ - ldr x2, =cpu1_only + ldr x2, =.Lcpu1_only /* Argument 3: context_id */ mov x3, 0 /* Unused hvc args: the Linux kernel zeroes them, diff --git a/baremetal/arch/arm/multicore.S b/baremetal/arch/arm/multicore.S index 76baa77..799bd7d 100644 --- a/baremetal/arch/arm/multicore.S +++ b/baremetal/arch/arm/multicore.S @@ -10,21 +10,21 @@ LKMC_PROLOGUE mrc p15, 0, r1, c0, c0, 5 ands r1, r1, 3 beq cpu0_only -cpu1_only: +.Lcpu1_only: mov r0, 1 ldr r1, =spinlock str r0, [r1] dmb sy sev -cpu1_sleep_forever: +.Lcpu1_sleep_forever: wfe - b cpu1_sleep_forever + b .Lcpu1_sleep_forever cpu0_only: #if !LKMC_GEM5 /* PSCI CPU_ON. */ ldr r0, =0x84000003 mov r1, 1 - ldr r2, =cpu1_only + ldr r2, =.Lcpu1_only mov r3, 0 hvc 0 #endif diff --git a/userland/arch/aarch64/adr.S b/userland/arch/aarch64/adr.S index 4b36342..f06570d 100644 --- a/userland/arch/aarch64/adr.S +++ b/userland/arch/aarch64/adr.S @@ -16,6 +16,5 @@ LKMC_PROLOGUE */ adr x0, data_label ldr x1, =data_label -label: LKMC_ASSERT_EQ_REG(x0, x1) LKMC_EPILOGUE diff --git a/userland/arch/aarch64/adrp.S b/userland/arch/aarch64/adrp.S index eddf332..0c874b7 100644 --- a/userland/arch/aarch64/adrp.S +++ b/userland/arch/aarch64/adrp.S @@ -3,9 +3,9 @@ #include LKMC_PROLOGUE - adrp x0, label - adr x1, label -label: + adrp x0, .Llabel + adr x1, .Llabel +.Llabel: /* Clear the lower 12 bits. */ bic x1, x1, 0xFF bic x1, x1, 0xF00 diff --git a/userland/arch/aarch64/cbz.S b/userland/arch/aarch64/cbz.S index 7fe2502..0e60164 100644 --- a/userland/arch/aarch64/cbz.S +++ b/userland/arch/aarch64/cbz.S @@ -6,14 +6,13 @@ LKMC_PROLOGUE /* Branch. */ mov x0, 0x0 - cbz x0, ok + cbz x0, .Lok LKMC_ASSERT_FAIL -ok: +.Lok: /* Don't branch. */ mov x0, 0x1 - cbz x0, ko - + cbz x0, .Lko LKMC_EPILOGUE -ko: +.Lko: LKMC_ASSERT_FAIL diff --git a/userland/arch/aarch64/movk.S b/userland/arch/aarch64/movk.S index c368573..a94b82c 100644 --- a/userland/arch/aarch64/movk.S +++ b/userland/arch/aarch64/movk.S @@ -17,10 +17,10 @@ LKMC_PROLOGUE * This could be used if the label is too far away for * adr relative addressing. */ - movz x0, :abs_g2:label /* bits 32-47, overflow check */ - movk x0, :abs_g1_nc:label /* bits 16-31, no overflow check */ - movk x0, :abs_g0_nc:label /* bits 0-15, no overflow check */ - adr x1, label -label: + movz x0, :abs_g2:.Llabel /* bits 32-47, overflow check */ + movk x0, :abs_g1_nc:.Llabel /* bits 16-31, no overflow check */ + movk x0, :abs_g0_nc:.Llabel /* bits 0-15, no overflow check */ + adr x1, .Llabel +.Llabel: LKMC_ASSERT_EQ_REG(x0, x1) LKMC_EPILOGUE diff --git a/userland/arch/aarch64/pc.S b/userland/arch/aarch64/pc.S index ffd5397..e2086e4 100644 --- a/userland/arch/aarch64/pc.S +++ b/userland/arch/aarch64/pc.S @@ -27,11 +27,11 @@ LKMC_PROLOGUE * "LDR (literal)" instead of "LDR (immediate)": * https://stackoverflow.com/questions/28638981/howto-write-pc-relative-adressing-on-arm-asm/54480999#54480999 */ - ldr x0, pc_relative_ldr - b 1f -pc_relative_ldr: + ldr x0, .Lpc_relative_ldr + b 2f +.Lpc_relative_ldr: .quad 0x123456789ABCDEF0 -1: +2: LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0) /* Just for fun, we can also use relative numbers instead of labels. @@ -68,7 +68,7 @@ pc_relative_ldr: ldr x0, pc_relative_str LKMC_ASSERT_EQ(x0, =0x0) adr x1, pc_relative_str - ldr x0, pc_relative_ldr + ldr x0, .Lpc_relative_ldr str x0, [x1] ldr x0, pc_relative_str LKMC_ASSERT_EQ(x0, =0x123456789ABCDEF0) diff --git a/userland/arch/arm/adr.S b/userland/arch/arm/adr.S index cb6a130..07af4dd 100644 --- a/userland/arch/arm/adr.S +++ b/userland/arch/arm/adr.S @@ -6,14 +6,14 @@ data_label: .word 0x1234678 LKMC_PROLOGUE - adr r4, label + adr r4, .Llabel /* objdump tells us that this uses the literal pool, * it does not get converted to adr, which is the better * alternative here. */ - ldr r5, =label - adrl r6, label -label: + ldr r5, =.Llabel + adrl r6, .Llabel +.Llabel: LKMC_ASSERT_EQ_REG(r4, r5) LKMC_ASSERT_EQ_REG(r4, r6) diff --git a/userland/arch/arm/b.S b/userland/arch/arm/b.S index 0e6af51..c1b3b31 100644 --- a/userland/arch/arm/b.S +++ b/userland/arch/arm/b.S @@ -3,7 +3,7 @@ #include LKMC_PROLOGUE /* Jump over the fail. 26-bit PC-relative. */ - b ok + b .Lok LKMC_ASSERT_FAIL -ok: +.Lok: LKMC_EPILOGUE diff --git a/userland/arch/arm/registers.S b/userland/arch/arm/registers.S index c9752bb..1d7aa6f 100644 --- a/userland/arch/arm/registers.S +++ b/userland/arch/arm/registers.S @@ -48,7 +48,6 @@ LKMC_PROLOGUE 10: /* Another example with mov reading from pc. */ -pc_addr: mov r0, pc /* Why sub 8: * https://stackoverflow.com/questions/24091566/why-does-the-arm-pc-register-point-to-the-instruction-after-the-next-one-to-be-e diff --git a/userland/arch/arm/str.S b/userland/arch/arm/str.S index 1ee6065..6161552 100644 --- a/userland/arch/arm/str.S +++ b/userland/arch/arm/str.S @@ -46,8 +46,8 @@ LKMC_PROLOGUE * This construct is not possible in ARMv8 for str: * https://github.com/cirosantilli/linux-kernel-module-cheat#armv8-aarch64-str-instruction */ - str r1, var_in_same_section -var_in_same_section: + str r1, .Lvar_in_same_section +.Lvar_in_same_section: #endif /* = sign just doesn't make sense for str, you can't set the diff --git a/userland/arch/x86_64/jmp.S b/userland/arch/x86_64/jmp.S index c11e41e..8e08a48 100644 --- a/userland/arch/x86_64/jmp.S +++ b/userland/arch/x86_64/jmp.S @@ -6,7 +6,7 @@ #include LKMC_PROLOGUE - jmp after_fail + jmp .Lafter_fail LKMC_ASSERT_FAIL -after_fail: +.Lafter_fail: LKMC_EPILOGUE diff --git a/userland/arch/x86_64/jmp_indirect.S b/userland/arch/x86_64/jmp_indirect.S index 25239c6..f90964d 100644 --- a/userland/arch/x86_64/jmp_indirect.S +++ b/userland/arch/x86_64/jmp_indirect.S @@ -8,15 +8,15 @@ LKMC_PROLOGUE /* Address in memory. */ .section .rodata - label_address: .quad memory_label + label_address: .quad .Lmemory_label .text jmp *label_address LKMC_ASSERT_FAIL -memory_label: +.Lmemory_label: /* Address in register. */ - lea register_label(%rip), %rax + lea .Lregister_label(%rip), %rax jmp *%rax LKMC_ASSERT_FAIL -register_label: +.Lregister_label: LKMC_EPILOGUE diff --git a/userland/arch/x86_64/loop.S b/userland/arch/x86_64/loop.S index 32b1560..8978817 100644 --- a/userland/arch/x86_64/loop.S +++ b/userland/arch/x86_64/loop.S @@ -13,9 +13,9 @@ LKMC_PROLOGUE */ mov $0, %rax mov $3, %rcx -loop_label: +.Lloop_label: inc %rax - loop loop_label + loop .Lloop_label LKMC_ASSERT_EQ(%rax, $3) /* LOOPE @@ -37,10 +37,10 @@ loop_label: /* Array length. */ mov $4, %rcx mov $-1, %rax -loope_label: +.Lloope_label: inc %rax cmpb $0, loope_array(%rax) - loope loope_label + loope .Lloope_label /* The first non-zero item (1) was at index 2. */ LKMC_ASSERT_EQ(%rax, $2)