baremetal: all examples working, all failures accounted for!

SIMD&FP is now enabled in arm from bootloader.

baremetal/arch/aarch64/el.c

@@ -1,4 +1,4 @@
-/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-level */
+/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-levels */
 
 #include <stdio.h>
 #include <inttypes.h>

baremetal/arch/aarch64/multicore.S

@@ -1,7 +1,8 @@
 /* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-multicore */
 
-.global main
-main:
+#include <lkmc.h>
+
+LKMC_PROLOGUE
     /* Reset spinlock. */
     mov x0, 0
     ldr x1, =spinlock
@@ -65,9 +66,6 @@ spinlock_start:
     /* Hint CPU 0 to enter low power mode. */
     wfe
     cbz x0, spinlock_start
-
-    mov x0, 0
-    ret
-
+LKMC_EPILOGUE
 spinlock:
     .skip 8

baremetal/arch/arm/el.c

@@ -1,4 +1,4 @@
-/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-level */
+/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-levels */
 
 #include <stdio.h>
 #include <inttypes.h>

baremetal/arch/arm/gem5_assert.S

@@ -1,19 +0,0 @@
-/* assert 0x12345678 + 1 == 0x12345679 */
-
-#include <lkmc/m5ops.h>
-
-.global main
-main:
-    adr r0, myvar
-    ldr r1, [r0]
-    add r1, r1, #1
-    str r1, [r0]
-    movw r2, #0x5679
-    movt r2, #0x1234
-    cmp r1, r2
-    beq ok
-    LKMC_M5OPS_FAIL_1_ASM
-ok:
-    LKMC_M5OPS_EXIT_ASM
-myvar:
-    .word 0x12345678

baremetal/arch/arm/multicore.S

@@ -1,16 +1,17 @@
 /* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-multicore */
 
-.global main
-main:
-    mov r0, #0
+#include <lkmc.h>
+
+LKMC_PROLOGUE
+    mov r0, 0
     ldr r1, =spinlock
     str r0, [r1]
     /* Get CPU ID. */
     mrc p15, 0, r1, c0, c0, 5
-    ands r1, r1, #3
+    ands r1, r1, 3
     beq cpu0_only
 cpu1_only:
-    mov r0, #1
+    mov r0, 1
     ldr r1, =spinlock
     str r0, [r1]
     dmb sy
@@ -22,17 +23,16 @@ cpu0_only:
 #if !LKMC_GEM5
     /* PSCI CPU_ON. */
     ldr r0, =0x84000003
-    mov r1, #1
+    mov r1, 1
     ldr r2, =cpu1_only
-    mov r3, #0
+    mov r3, 0
     hvc 0
 #endif
 spinlock_start:
     ldr r0, spinlock
     wfe
-    cmp r0, #0
+    cmp r0, 0
     beq spinlock_start
-    mov r0, #0
-    bx lr
+LKMC_EPILOGUE
 spinlock:
     .skip 4

baremetal/arch/arm/regs.S

@@ -1,9 +1,11 @@
 /* See the aarch64 version. */
-.global main
-main:
+
+#include <lkmc.h>
+
+LKMC_PROLOGUE
     mov r0, #1
     /* test-gdb-r0 */
     mov r1, #2
     /* test-gdb-r1 */
     mov r0, #0
-    bx lr
+LKMC_EPILOGUE

baremetal/arch/arm/return1.S

@@ -1,5 +0,0 @@
-/* https://github.com/cirosantilli/linux-kernel-module-cheat#magic-failure-string */
-.global main
-main:
-    mov r0, #1
-    bx lr

baremetal/lib/aarch64.S

@@ -2,15 +2,15 @@
 
 .global lkmc_start
 lkmc_start:
-    /* = NEON setup */
-    mov x1, #(0x3 << 20)
-    msr cpacr_el1, x1
-    isb
-
     /* Load the vector table. */
     ldr x0, =lkmc_vector_table
     msr vbar_el1, x0
 
+    /* https://github.com/cirosantilli/linux-kernel-module-cheat#aarch64-baremetal-neon-setup */
+    mov x1, 0x3 << 20
+    msr cpacr_el1, x1
+    isb
+
     /* Prepare the stack for main, mandatory for C code. */
     ldr x0, =stack_top
     mov sp, x0
@@ -30,8 +30,8 @@ LKMC_VECTOR_TABLE
 
 /* Default trap handler. */
 LKMC_WEAK(lkmc_vector_trap_handler)
-    ldr x0, =lkmc_vector_trap_handler_error
+    ldr x0, =lkmc_vector_trap_handler_error_message
     bl puts
     bl abort
-lkmc_vector_trap_handler_error:
+lkmc_vector_trap_handler_error_message:
     .asciz "error: unexpected interrupt"

baremetal/lib/arm.S

@@ -5,6 +5,19 @@ lkmc_start:
     /* Prepare the stack for main, mandatory for C code. */
     ldr sp, =stack_top
 
+    /* Enable floating point.
+     * Code copied from: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0409h/CHDEGGFF.html
+     * Without this, SIMD operations such as vmov raise an exception.
+     */
+    mrc p15, 0, r0, c1, c0, 2 /* Read CPACR into r0 */
+    orr r0, r0, 3 << 20       /* OR in User and Privileged access for CP10 */
+    orr r0, r0, 3 << 22       /* OR in User and Privileged access for CP11 */
+    bic r0, r0, 3 << 30       /* Clear ASEDIS/D32DIS if set */
+    mcr p15, 0, r0, c1, c0, 2 /* Store new access permissions into CPACR */
+    isb                       /* Ensure side-effect of CPACR is visible */
+    mov r0, 1 << 30           /* Create value with FPEXC (bit 30) set in r0 */
+    vmsr fpexc, r0            /* Enable VFP and SIMD extensions */
+
     /* https://github.com/cirosantilli/linux-kernel-module-cheat#magic-failure-string */
     ldr r0, =lkmc_baremetal_on_exit_callback
     bl on_exit