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x86 asm: move most of registers from x86-assembly-cheat
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50
README.adoc
50
README.adoc
@@ -11847,6 +11847,7 @@ Other infrastructure sanity checks that you might want to look into include:
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After seeing an <<userland-assembly,ADD hello world>>, you need to learn the general registers:
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After seeing an <<userland-assembly,ADD hello world>>, you need to learn the general registers:
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* x86: <<x86-registers>>
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* arm
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* arm
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** link:userland/arch/arm/registers.S[]
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** link:userland/arch/arm/registers.S[]
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* aarch64
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* aarch64
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@@ -12354,6 +12355,45 @@ Applications: http://stackoverflow.com/questions/234906/whats-the-purpose-of-the
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Arch agnostic infrastructure getting started at: <<userland-assembly>>.
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Arch agnostic infrastructure getting started at: <<userland-assembly>>.
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=== x86 registers
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link:userland/arch/x86_64/registers.S
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....
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|-----------------------------------------------|
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| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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|-----------------------------------------------|
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| | | AH | AL |
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|-----------------------------------------------|
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| | | AX |
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|-----------------------------------------------|
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| | EAX |
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|-----------------------------------------------|
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| RAX |
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|-----------------------------------------------|
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....
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For the newer x86_64 registers, the naming convention is somewhat saner:
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....
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|-----------------------------------------------|
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| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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|-----------------------------------------------|
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| | |R12H |R12L |
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|-----------------------------------------------|
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| | | R12W |
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|-----------------------------------------------|
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| | R12D |
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|-----------------------------------------------|
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| R12 |
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|-----------------------------------------------|
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....
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Most of the 8 older x86 general purpose registers are not "really" general purpose in the sense that a few instructions magically use them without an explicit encoding. This is reflected in their names:
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* RAX: Accumulator. The general place where you add, subtract and otherwise manipulate results in-place. Magic for example for <<MUL,x86 binary arithmetic instructions>>
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* RCX, RSI, RDI: Counter, Source and Destination. Used in <<x86-string-instructions>>
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=== x86 addressing modes
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=== x86 addressing modes
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Example: link:userland/arch/x86_64/address_modes.S[]
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Example: link:userland/arch/x86_64/address_modes.S[]
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@@ -12631,7 +12671,7 @@ These instructions do some operation on an array item, and automatically update
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** link:userland/arch/x86_64/movs.S[]: MOVS: MOV String: move from one memory to another with addresses given by RSI and RDI. Could be used to implement `memmov`.
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** link:userland/arch/x86_64/movs.S[]: MOVS: MOV String: move from one memory to another with addresses given by RSI and RDI. Could be used to implement `memmov`.
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** link:userland/arch/x86_64/scas.S[]: SCAS: SCan String: compare memory to the value in a register. Could be used to implement `strchr`.
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** link:userland/arch/x86_64/scas.S[]: SCAS: SCan String: compare memory to the value in a register. Could be used to implement `strchr`.
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The RSI and RDI registers are actually named after these intructions! S is the source of string instructions, D is the destination of string instructions.
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The RSI and RDI registers are actually named after these intructions! S is the source of string instructions, D is the destination of string instructions: https://stackoverflow.com/questions/1856320/purpose-of-esi-edi-registers
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The direction of the index increment depends on the direction flag of the FLAGS register: 0 means forward and 1 means backward: https://stackoverflow.com/questions/9636691/what-are-cld-and-std-for-in-x86-assembly-language-what-does-df-do
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The direction of the index increment depends on the direction flag of the FLAGS register: 0 means forward and 1 means backward: https://stackoverflow.com/questions/9636691/what-are-cld-and-std-for-in-x86-assembly-language-what-does-df-do
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@@ -15402,11 +15442,17 @@ which also downloads build dependencies.
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Then the following times just to the faster:
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Then the following times just to the faster:
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....
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....
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./build-docs
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./build-doc
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....
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....
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Source: link:build-doc[]
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Source: link:build-doc[]
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Then just open the HTML output at:
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....
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xdg-open out/README.html
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....
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[[documentation-verification]]
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[[documentation-verification]]
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==== Documentation verification
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==== Documentation verification
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56
userland/arch/x86_64/registers.S
Normal file
56
userland/arch/x86_64/registers.S
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@@ -0,0 +1,56 @@
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/* https://github.com/cirosantilli/linux-kernel-module-cheat#x86-registers */
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#include <lkmc.h>
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LKMC_PROLOGUE
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/* All the 16 general purpose registers. */
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mov $0x0, %rax
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mov $0x0, %rcx
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mov $0x0, %rdx
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mov $0x0, %rbx
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#if 0
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/* We don't want to do touch those because if affets our main call stack. */
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mov $0x0, %rbp
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mov $0x0, %rsp
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#endif
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mov $0x0, %rsi
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mov $0x0, %rdi
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mov $0x0, %r8
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mov $0x0, %r9
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mov $0x0, %r10
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mov $0x0, %r11
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mov $0x0, %r12
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mov $0x0, %r13
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mov $0x0, %r14
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mov $0x0, %r15
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/* EAX and AX. */
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mov $0x11111111, %eax
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mov $0x2222, %ax
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LKMC_ASSERT_EQ_32(%eax, $0x11112222)
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/* EAX, AL and AH. */
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mov $0x11111111, %eax
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mov $0x22, %ah
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mov $0x33, %al
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LKMC_ASSERT_EQ_32(%eax, $0x11112233)
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/* R12D, R12W and R12B */
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mov $0x11111111, %r12d
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mov $0x2222, %r12w
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mov $0x33, %r12b
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LKMC_ASSERT_EQ_32(%r12d, $0x11112233)
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#if 0
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/* There is no R12H: the second byte is only addressable on the old registers.
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* Error: bad register name `%r12h' */
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mov $0x22, %r12h
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#endif
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/* Keep in mind that most 32-bit register instructions zero out the top bits of RAX!
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* https://stackoverflow.com/questions/11177137/why-do-x86-64-instructions-on-32-bit-registers-zero-the-upper-part-of-the-full-6 */
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mov $0x1122334455667788, %r12
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LKMC_ASSERT_EQ_32(%r12d, $0x55667788)
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mov $0x99AABBCC, %r12
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LKMC_ASSERT_EQ(%r12, $0x0000000099AABBCC)
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LKMC_EPILOGUE
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