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baremetal: move aarch64 el.c into dump_regs.c

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Also start disassembling registers nicely dump_regs so we can have a
single executable to handle all register queries.
This commit is contained in:
Ciro Santilli 六四事件 法轮功
2019-05-27 00:00:01 +00:00
parent 3527c8df5b
commit 8eb312c58d
5 changed files with 47 additions and 60 deletions
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9
baremetal/arch/aarch64/dump_regs.c
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@@ -6,6 +6,13 @@
int main(void) {
uint32_t sctlr_el1;
__asm__ ("mrs %0, sctlr_el1" : "=r" (sctlr_el1) : :);
printf("sctlr_el1 0x%" PRIx32 "\n", sctlr_el1);
printf("SCTLR_EL1 0x%" PRIX32 "\n", sctlr_el1);
printf("SCTLR_EL1.A 0x%" PRIX32 "\n", (sctlr_el1 >> 1) & 1);
uint64_t CurrentEL;
__asm__ ("mrs %0, CurrentEL;" : "=r" (CurrentEL) : :);
printf("CurrentEL 0x%" PRIX64 "\n", CurrentEL);
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-levels */
printf("CurrentEL.EL 0x%" PRIX64 "\n", CurrentEL >> 2);
return 0;
}

11
baremetal/arch/aarch64/el.c
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@@ -1,11 +0,0 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-levels */
#include <stdio.h>
#include <inttypes.h>
int main(void) {
uint64_t el;
__asm__ ("mrs %0, CurrentEL;" : "=r" (el) : :);
printf("%" PRIu64 "\n", el >> 2);
return 0;
}

6
baremetal/arch/arm/dump_regs.c
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@@ -4,12 +4,14 @@
int main(void) {
uint32_t cpsr;
__asm__ ("mrs %0, cpsr" : "=r" (cpsr) : :);
printf("cpsr %" PRIx32 "\n", cpsr);
printf("CPSR 0x%" PRIX32 "\n", cpsr);
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-levels */
printf("CPSR.M 0x%" PRIX32 "\n", cpsr & 0xF);
/* TODO this is blowing up an exception, how to I read from it? */
/*uint32_t mvfr1;*/
/*__asm__ ("vmrs %0, mvfr1" : "=r" (mvfr1) : :);*/
/*printf("mvfr1 %" PRIx32 "\n", mvfr1);*/
/*printf("MVFR1 0x%" PRIX32 "\n", mvfr1);*/
return 0;
}

11
baremetal/arch/arm/el.c
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@@ -1,11 +0,0 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-exception-levels */
#include <stdio.h>
#include <inttypes.h>
int main(void) {
uint32_t cpsr;
__asm__ ("mrs %0, CPSR" : "=r" (cpsr) : :);
printf("%" PRIu32 "\n", cpsr & 0x1F);
return 0;
}