mirror of
https://github.com/cirosantilli/linux-kernel-module-cheat.git
synced 2026-01-23 02:05:57 +01:00
arm sve: enable on baremetal by setting missing bits CPACR_EL1.ZEN
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@@ -4,22 +4,22 @@
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LKMC_PROLOGUE
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/* 0x00 && 0xFF == 0x00 */
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/* 0x00 & 0xFF == 0x00 */
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mov r0, 0x00
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and r0, 0xFF
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LKMC_ASSERT_EQ(r0, =0x00)
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/* 0x0F && 0xF0 == 0x00 */
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/* 0x0F & 0xF0 == 0x00 */
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mov r0, 0x0F
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and r0, 0xF0
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LKMC_ASSERT_EQ(r0, =0x00)
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/* 0x0F && 0xFF == 0x0F */
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/* 0x0F & 0xFF == 0x0F */
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mov r0, 0x0F
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and r0, 0xFF
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LKMC_ASSERT_EQ(r0, =0x0F)
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/* 0xF0 && 0xFF == 0xF0 */
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/* 0xF0 & 0xFF == 0xF0 */
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mov r0, 0xF0
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and r0, 0xFF
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LKMC_ASSERT_EQ(r0, =0xF0)
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27
userland/arch/arm/orr.S
Normal file
27
userland/arch/arm/orr.S
Normal file
@@ -0,0 +1,27 @@
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/* https://cirosantilli.com/linux-kernel-module-cheat#arm-bitwise-instructions */
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#include <lkmc.h>
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LKMC_PROLOGUE
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/* 0x00 | 0xFF == 0x00 */
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mov r0, 0x00
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orr r0, 0xFF
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LKMC_ASSERT_EQ(r0, =0xFF)
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/* 0x0F | 0xF0 == 0x00 */
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mov r0, 0x0F
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orr r0, 0xF0
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LKMC_ASSERT_EQ(r0, =0xFF)
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/* 0x0F | 0x0F == 0x0F */
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mov r0, 0x0F
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orr r0, 0x0F
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LKMC_ASSERT_EQ(r0, =0x0F)
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/* 0xF0 | 0xF0 == 0xF0 */
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mov r0, 0xF0
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and r0, 0xF0
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LKMC_ASSERT_EQ(r0, =0xF0)
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LKMC_EPILOGUE
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