Present at:
+Depending on which archive you download from there, you can find some of:
+Ubuntu based images
+precompiled Linux kernels, with the gem5 arm Linux kernel patches for arm
+precompiled gem5 bootloaders for ISAs that have them, e.g. ARM
+precompiled DTBs if you don’t want to use autogeneration for some crazy reason
+Some of those images are also used on the gem5 unit tests continuous integration.
+Could be used as an alternative to this repository. But why would you do that? :-)
+E.g. to use a precompiled ARM kernel:
+mkdir aarch-system-201901106 +cd aarch-system-201901106 +wget http://www.gem5.org/dist/current/arm/aarch-system-201901106.tar.bz2 +tar xvf aarch-system-201901106.tar.bz2 +cd .. +./run --arch aarch64 --emulator gem5 --linux-exec aarch-system-201901106/binaries/vmlinux.arm64+
Internals under other sections:
In order to develop complex C++ software such as gem5, a good IDE setup is fundamental.
The interaction uses the Python C extension interface https://docs.python.org/2/extending/extending.html interface through the pybind11 helper library: https://github.com/pybind/pybind11
The main is at: src/sim/main.cc. It calls:
gem5 is an event based simulator, and as such the event queue is of of the crucial elements in the system.
This calls the Event::process method of the event.
Let’s now analyze every single event on a minimal gem5 syscall emulation mode in the simplest CPU that we have:
TODO: analyze better what each of the memory event mean. For now, we have just collected a bunch of data there, but needs interpreting. The CPU specifics in this section are already insightful however.
Let’s just add --caches to see if things go any faster:
The events for the Atomic CPU were pretty simple: basically just ticks.
This describes the internals of the gem5 m5out/stats.txt file.
gem5 uses a ton of code generation, which makes the project horrendous:
But it has been widely overused to insanity. It likely also exists partly because when the project started in 2003 C++ compilers weren’t that good, so you couldn’t rely on features like templates that much.
Generated code at: build/<ISA>/config/the_isa.hh which contains amongst other lines:
E.g. src/cpu/decode_cache.hh includes:
Some scons madness.
Certain ISAs like ARM have bootloaders that are automatically run before the main image to setup basic system state.
+We cross compile those bootloaders from source automatically during ./build-gem5.
As of gem5 bcf041f257623e5c9e77d35b7531bae59edc0423, the source code of the bootloaderes can be found under:
+system/arm/+
and their selection can be seen under: src/dev/arm/RealView.py, e.g.:
def setupBootLoader(self, cur_sys, loc):
+ if not cur_sys.boot_loader:
+ cur_sys.boot_loader = [ loc('boot_emm.arm64'), loc('boot_emm.arm') ]
+