gic: rename gicv3 to gic, move board.h into gic

baremetal/arch/aarch64/timer.c

@@ -2,7 +2,7 @@
 #include <inttypes.h>
 
 #include <lkmc.h>
-#include <lkmc/gicv3.h>
+#include <lkmc/gic.h>
 
 #define INTERRUPT_FREQUENCY 1
 
@@ -61,7 +61,7 @@ void lkmc_vector_trap_handler(
     int rc;
     if ((exception->exc_type & 0xff) == LKMC_VECTOR_IRQ_SPX) {
         psw_disable_and_save_interrupt(&psw);
-        rc = gic_v3_find_pending_irq(exception, &irq);
+        rc = gic_find_pending_irq(exception, &irq);
         if (rc) {
             puts("IRQ not found!");
             goto restore_irq_out;
@@ -69,7 +69,7 @@ void lkmc_vector_trap_handler(
             printf("IRQ number 0x%" PRIX32 "\n", irq);
         }
         gicd_disable_int(irq);
-        gic_v3_eoi(irq);
+        gic_eoi(irq);
         // Timer specific stuff.
         {
             disable_cntv();
@@ -102,6 +102,7 @@ int main(void) {
     lkmc_sysreg_print_cntvct_el0();
     puts("");
 
+<<<<<<< Updated upstream
     gic_v3_initialize();
     {
         /*uint64_t ticks, current_cnt;*/
@@ -112,6 +113,11 @@ int main(void) {
         enable_cntv();
         enable_irq();
     }
+=======
+    gic_initialize();
+    enable_cntv();
+    enable_irq();
+>>>>>>> Stashed changes
     while (1) {
         lkmc_arm_aarch64_wfi();
     }

build-baremetal

@@ -88,6 +88,7 @@ Build the baremetal examples with crosstool-NG.
         else:
             entry_address = 0x40000000
             uart_address = 0x09000000
+            cc_flags.extend(['-D', 'LKMC_QEMU=1', LF])
         cc_flags.extend(['-D', 'LKMC_UART0_ADDR={:#x}'.format(uart_address), LF])
         cc_flags.extend(self.sh.shlex_split(self.env['ccflags']))
         bootloader_src = os.path.join(

lkmc/board.h

@@ -1,21 +0,0 @@
-#ifndef LKMC_BOARD_H
-#define LKMC_BOARD_H
-# define QEMU_VIRT_GIC_BASE          (0x08000000)
-# define QEMU_VIRT_GIC_INT_MAX       (64)
-# define QEMU_VIRT_GIC_PRIO_MAX      (16)
-/* SGI: Interrupt IDs 0-15 */
-/* PPI: Interrupt IDs 16-31 */
-/* SPI: Interrupt IDs 32-63 */
-# define QEMU_VIRT_GIC_INTNO_SGIO    (0)
-# define QEMU_VIRT_GIC_INTNO_PPIO    (16)
-# define QEMU_VIRT_GIC_INTNO_SPIO    (32)
-# define GIC_BASE                    (QEMU_VIRT_GIC_BASE)
-# define GIC_INT_MAX                 (QEMU_VIRT_GIC_INT_MAX)
-# define GIC_PRIO_MAX                (QEMU_VIRT_GIC_PRIO_MAX)
-# define GIC_INTNO_SGI0              (QEMU_VIRT_GIC_INTNO_SGIO)
-# define GIC_INTNO_PPI0              (QEMU_VIRT_GIC_INTNO_PPIO)
-# define GIC_INTNO_SPI0              (QEMU_VIRT_GIC_INTNO_SPIO)
-# define GIC_PRI_SHIFT               (4)
-# define GIC_PRI_MASK                (0x0f)
-# define TIMER_IRQ                   (27)  /** Timer IRQ  */
-#endif

lkmc/gic.h

@@ -1,8 +1,25 @@
-#ifndef LKMC_GICV3_H
+#ifndef LKMC_GIC_H
-#define LKMC_GICV3_H
+#define LKMC_GIC_H
 
 #include <lkmc/aarch64.h>
-#include <lkmc/board.h>
+
+#if LKMC_QEMU
+/* info qtree contains:
+ *   dev: arm_gic, id ""
+ *     mmio 0000000008000000/0000000000001000 */
+#define GIC_BASE       0x08000000
+#elif LKMC_GEM5
+/* https://github.com/gem5/gem5/blob/f525028c126af33da532f6703a152d81d900dcf7/src/dev/arm/RealView.py#L952 */
+#define GIC_BASE       0x2c001000
+#endif
+#define GIC_INT_MAX    64
+#define GIC_PRIO_MAX   16
+#define GIC_INTNO_SGI0 0
+#define GIC_INTNO_PPI0 16
+#define GIC_INTNO_SPI0 32
+#define GIC_PRI_SHIFT  4
+#define GIC_PRI_MASK   0x0f
+#define TIMER_IRQ      27
 
 typedef int32_t irq_no;
 
@@ -107,9 +124,9 @@ this register determines only Group 0 interrupt preemption. */
 #define REG_GIC_GICD_CPENDSGIR(n)     ((volatile uint32_t *)(uintptr_t)GIC_GICD_CPENDSGIR(n))
 #define REG_GIC_GICD_SPENDSGIR(n)     ((volatile uint32_t *)(uintptr_t)GIC_GICD_SPENDSGIR(n))
 
-void gic_v3_initialize(void);
+void gic_initialize(void);
-void gic_v3_eoi(irq_no irq);
+void gic_eoi(irq_no irq);
-int gic_v3_find_pending_irq(
+int gic_find_pending_irq(
     LkmcVectorExceptionFrame *exc __attribute__((unused)),
     irq_no *irqp
 );
@@ -273,7 +290,7 @@ static void gicd_config(irq_no irq, unsigned int config) {
  * @param[in] ctrlr   IRQ controller information
  * @param[in] irq     IRQ number
  */
-void gic_v3_eoi(irq_no irq) {
+void gic_eoi(irq_no irq) {
     gicd_clear_pending(irq);
 }
 
@@ -282,7 +299,7 @@ void gic_v3_eoi(irq_no irq) {
  * I supppose the current access is security, because GICD_CTLR.DS is 0b0 and
  * we can access.
  */
-void gic_v3_initialize(void) {
+void gic_initialize(void) {
     init_gicd();
     init_gicc();
     gicd_config(TIMER_IRQ, GIC_GICD_ICFGR_EDGE);
@@ -298,7 +315,7 @@ void gic_v3_initialize(void) {
  * @param[in,out] irqp An IRQ number to be processed
  * @return        0 if found, 1 if not found
  */
-int gic_v3_find_pending_irq(
+int gic_find_pending_irq(
     LkmcVectorExceptionFrame *exc __attribute__((unused)),
     irq_no *irqp
 ) {