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46
baremetal/arch/arm/enable_cache.S
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46
baremetal/arch/arm/enable_cache.S
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/* TODO not working on gem5. Maybe we need to flush some pipelines after the sysreg accesses. */
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#include <lkmc.h>
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#define NELEM 4
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#define ELEM_SIZE 4
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.data;
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.align 4
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my_array_1:
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.word 0x11111111, 0x22222222, 0x33333333, 0x44444444
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my_array_2:
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.word 0x99999999, 0xAAAAAAAA, 0xBBBBBBBB, 0xCCCCCCCC
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LKMC_PROLOGUE
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/* Modify the array. */
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ldr r4, =my_array_1
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ldr r5, =0x55555555
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ldr r6, =0x66666666
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ldr r7, =0x77777777
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ldr r8, =0x88888888
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stmia r4, {r5-r8}
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mrc p15, 0, r0, c1, c0, 0
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orr r0, r0, (1 << 2) /* SCTLR.C */
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orr r0, r0, (1 << 28) /* SCTLR.TRE */
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mcr p15, 0, r0, c1, c0, 0
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mrc p15, 0, r0, c9, c2, 1
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orr r0, r0, 1 /* NMRR.IR0 */
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orr r0, r0, (1 << 16) /* NMRR.OR0 */
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mcr p15, 0, r0, c9, c2, 1
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/* Modify the again. */
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ldr r4, =my_array_1
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ldr r5, =0x99999999
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ldr r6, =0xAAAAAAAA
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ldr r7, =0xBBBBBBBB
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ldr r8, =0xCCCCCCCC
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stmia r4, {r5-r8}
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/* Verify that my_array_0 changed and is equal to my_array_1. */
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LKMC_ASSERT_MEMCMP(my_array_1, my_array_2, =0x10)
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LKMC_EPILOGUE
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