From 7db96f405a970cb162085685db7f89cf16afdd72 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ciro=20Santilli=20=E5=85=AD=E5=9B=9B=E4=BA=8B=E4=BB=B6=20?= =?UTF-8?q?=E6=B3=95=E8=BD=AE=E5=8A=9F?= Date: Tue, 22 Jan 2019 00:00:00 +0000 Subject: [PATCH] baremetal: some quick fixes --- baremetal/arch/aarch64/multicore.S | 1 + baremetal/arch/aarch64/timer.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/baremetal/arch/aarch64/multicore.S b/baremetal/arch/aarch64/multicore.S index 2eafd35..45d8f8f 100644 --- a/baremetal/arch/aarch64/multicore.S +++ b/baremetal/arch/aarch64/multicore.S @@ -9,6 +9,7 @@ main: /* Read cpu id into x1. * TODO: cores beyond 4th? + * Mnemonic: Main Processor ID Register */ mrs x1, mpidr_el1 ands x1, x1, 3 diff --git a/baremetal/arch/aarch64/timer.c b/baremetal/arch/aarch64/timer.c index b561569..f07466e 100644 --- a/baremetal/arch/aarch64/timer.c +++ b/baremetal/arch/aarch64/timer.c @@ -17,7 +17,7 @@ #define SYSREG_WRITE(type, name) \ void name ## _write(type name) { \ __asm__ __volatile__("msr " #name ", %0" : : "r" (name) : ); \ - } \ + } #define SYSREG_READ_WRITE(name, type) \ SYSREG_READ(name, type) \