3rd-party/linux-kernel-module-cheat
1
0
Fork 0
mirror of https://github.com/cirosantilli/linux-kernel-module-cheat.git synced 2026-01-23 02:05:57 +01:00
Code Issues Releases Wiki Activity

userland: scope every header identifier with lkmc_

Browse Source
This commit is contained in:
Ciro Santilli 六四事件 法轮功
2019-05-21 00:00:01 +00:00
parent 6fe9e5bae7
commit 72200dee4e
78 changed files with 369 additions and 377 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
userland/arch/arm/add.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Immediate encoding.
*
@@ -11,7 +11,7 @@ ENTRY
mov r0, 1
/* r1 = r0 + 2 */
add r1, r0, 2
ASSERT_EQ(r1, 3)
LKMC_ASSERT_EQ(r1, 3)
/* If src == dest, we can omit one of them.
*
@@ -19,12 +19,12 @@ ENTRY
*/
mov r0, 1
add r0, 2
ASSERT_EQ(r0, 3)
LKMC_ASSERT_EQ(r0, 3)
/* Same as above but explicit. */
mov r0, 1
add r0, r0, 2
ASSERT_EQ(r0, 3)
LKMC_ASSERT_EQ(r0, 3)
#if 0
/* But we cannot omit the register if there is a shift when using .syntx unified:
@@ -44,7 +44,7 @@ ENTRY
mov r0, 1
mov r1, 2
add r2, r0, r1
ASSERT_EQ(r2, 3)
LKMC_ASSERT_EQ(r2, 3)
/* Register encoding, omit implicit register.
*
@@ -53,6 +53,6 @@ ENTRY
mov r0, 1
mov r1, 2
add r1, r0
ASSERT_EQ(r1, 3)
LKMC_ASSERT_EQ(r1, 3)
EXIT
LKMC_EXIT

20
userland/arch/arm/address_modes.S
View File

@@ -2,36 +2,36 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Offset mode with immediate. Add 4 to the address register,
* which ends up * reading myvar6 instead of myvar.
*/
adr r4, myvar
ldr r5, [r4, 4]
ASSERT_EQ(r5, 0x9ABCDEF0)
LKMC_ASSERT_EQ(r5, 0x9ABCDEF0)
/* r4 was not modified. */
ASSERT_EQ(r4, myvar)
LKMC_ASSERT_EQ(r4, myvar)
/* Pre-indexed mode: modify register, then use it. */
adr r4, myvar
ldr r5, [r4, 4]!
ASSERT_EQ(r5, 0x9ABCDEF0)
LKMC_ASSERT_EQ(r5, 0x9ABCDEF0)
/* r4 was modified. */
ASSERT_EQ(r4, myvar6)
LKMC_ASSERT_EQ(r4, myvar6)
/* Post-indexed mode: use register, then modify it. */
adr r4, myvar
ldr r5, [r4], 4
ASSERT_EQ(r5, 0x12345678)
LKMC_ASSERT_EQ(r5, 0x12345678)
/* r4 was modified. */
ASSERT_EQ(r4, myvar6)
LKMC_ASSERT_EQ(r4, myvar6)
/* Offset in register. */
adr r4, myvar
mov r5, 4
ldr r6, [r4, r5]
ASSERT_EQ(r6, 0x9ABCDEF0)
LKMC_ASSERT_EQ(r6, 0x9ABCDEF0)
/* Offset in shifted register:
* r6 =
@@ -42,9 +42,9 @@ ENTRY
adr r4, myvar
mov r5, 2
ldr r6, [r4, r5, lsl 1]
ASSERT_EQ(r6, 0x9ABCDEF0)
LKMC_ASSERT_EQ(r6, 0x9ABCDEF0)
EXIT
LKMC_EXIT
myvar:
.word 0x12345678
myvar6:

8
userland/arch/arm/adr.S
View File

@@ -5,7 +5,7 @@
.data
data_label:
.word 0x1234678
ENTRY
LKMC_ENTRY
adr r4, label
/* objdump tells us that this uses the literal pool,
* it does not get converted to adr, which is the better
@@ -14,8 +14,8 @@ ENTRY
ldr r5, =label
adrl r6, label
label:
ASSERT_EQ_REG(r4, r5)
ASSERT_EQ_REG(r4, r6)
LKMC_ASSERT_EQ_REG(r4, r5)
LKMC_ASSERT_EQ_REG(r4, r6)
#if 0
/* Error: symbol .data is in a different section.
@@ -30,4 +30,4 @@ label:
*/
adr r5, data_label
#endif
EXIT
LKMC_EXIT

12
userland/arch/arm/and.S
View File

@@ -2,26 +2,26 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 0x00 && 0xFF == 0x00 */
mov r0, 0x00
and r0, 0xFF
ASSERT_EQ(r0, 0x00)
LKMC_ASSERT_EQ(r0, 0x00)
/* 0x0F && 0xF0 == 0x00 */
mov r0, 0x0F
and r0, 0xF0
ASSERT_EQ(r0, 0x00)
LKMC_ASSERT_EQ(r0, 0x00)
/* 0x0F && 0xFF == 0x0F */
mov r0, 0x0F
and r0, 0xFF
ASSERT_EQ(r0, 0x0F)
LKMC_ASSERT_EQ(r0, 0x0F)
/* 0xF0 && 0xFF == 0xF0 */
mov r0, 0xF0
and r0, 0xFF
ASSERT_EQ(r0, 0xF0)
LKMC_ASSERT_EQ(r0, 0xF0)
EXIT
LKMC_EXIT

6
userland/arch/arm/b.S
View File

@@ -1,9 +1,9 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#arm-b-instruction */
#include "common.h"
ENTRY
LKMC_ENTRY
/* Jump over the fail. 26-bit PC-relative. */
b ok
FAIL
LKMC_FAIL
ok:
EXIT
LKMC_EXIT

22
userland/arch/arm/beq.S
View File

@@ -2,27 +2,27 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Smaller*/
mov r0, 1
cmp r0, 2
ASSERT(ble)
ASSERT(blt)
ASSERT(bne)
LKMC_ASSERT(ble)
LKMC_ASSERT(blt)
LKMC_ASSERT(bne)
/* Equal. */
mov r1, 0
cmp r1, 0
ASSERT(beq)
ASSERT(bge)
ASSERT(ble)
LKMC_ASSERT(beq)
LKMC_ASSERT(bge)
LKMC_ASSERT(ble)
/* Greater. */
mov r0, 2
cmp r0, 1
ASSERT(bge)
ASSERT(bgt)
ASSERT(bne)
LKMC_ASSERT(bge)
LKMC_ASSERT(bgt)
LKMC_ASSERT(bne)
EXIT
LKMC_EXIT

6
userland/arch/arm/bfi.S
View File

@@ -2,9 +2,9 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr r0, =0x11223344
ldr r1, =0xFFFFFFFF
bfi r1, r0, 8, 16
ASSERT_EQ(r1, 0xFF3344FF)
EXIT
LKMC_ASSERT_EQ(r1, 0xFF3344FF)
LKMC_EXIT

6
userland/arch/arm/bic.S
View File

@@ -2,9 +2,9 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 0x0F & ~0x55 == 0x0F & 0xAA == 0x0A */
mov r0, 0x0F
bic r0, 0x55
ASSERT_EQ(r0, 0x0A)
EXIT
LKMC_ASSERT_EQ(r0, 0x0A)
LKMC_EXIT

6
userland/arch/arm/bl.S
View File

@@ -2,11 +2,11 @@
#include "common.h"
ENTRY
LKMC_ENTRY
mov r0, 1
bl inc
ASSERT_EQ(r0, 2)
EXIT
LKMC_ASSERT_EQ(r0, 2)
LKMC_EXIT
/* void inc(int *i) { (*i)++ } */
inc:

10
userland/arch/arm/clz.S
View File

@@ -2,16 +2,16 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr r0, =0x7FFFFFFF
clz r1, r0
ASSERT_EQ(r1, 1)
LKMC_ASSERT_EQ(r1, 1)
ldr r0, =0x3FFFFFFF
clz r1, r0
ASSERT_EQ(r1, 2)
LKMC_ASSERT_EQ(r1, 2)
ldr r0, =0x1FFFFFFF
clz r1, r0
ASSERT_EQ(r1, 3)
EXIT
LKMC_ASSERT_EQ(r1, 3)
LKMC_EXIT

4
userland/arch/arm/comments.S
View File

@@ -1,7 +1,7 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#gnu-gas-assembler-comments */
#include "common.h"
ENTRY
LKMC_ENTRY
# mycomment
@ mycomment
/* # only works at the beginning of the line.
@@ -11,4 +11,4 @@ ENTRY
nop # mycomment
#endif
nop @ mycomment
EXIT
LKMC_EXIT

39
userland/arch/arm/common_arch.h
View File

@@ -8,35 +8,35 @@
/* Assert that a register equals a constant.
* * reg: the register to check
* * const: the constant to compare to. Only works for literals or labels, not for registers.
* For register / register comparison, use ASSERT_EQ_REG.
* For register / register comparison, use LKMC_ASSERT_EQ_REG.
*/
#define ASSERT_EQ(reg, const) \
#define LKMC_ASSERT_EQ(reg, const) \
mov r0, reg; \
ldr r1, =const; \
ASSERT_EQ_DO; \
LKMC_ASSERT_EQ_DO; \
;
#define ASSERT_EQ_DO \
bl assert_eq_32; \
#define LKMC_ASSERT_EQ_DO \
bl lkmc_assert_eq_32; \
cmp r0, 0; \
ASSERT(beq); \
LKMC_ASSERT(beq); \
;
#define ASSERT_EQ_REG(reg1, reg2) \
#define LKMC_ASSERT_EQ_REG(reg1, reg2) \
str reg2, [sp, -4]!; \
mov r0, reg1; \
ldr r1, [sp], 4; \
ASSERT_EQ_DO; \
LKMC_ASSERT_EQ_DO; \
;
/* Assert that two arrays are the same. */
#define ASSERT_MEMCMP(label1, label2, const_size) \
#define LKMC_ASSERT_MEMCMP(label1, label2, const_size) \
ldr r0, =label1; \
ldr r1, =label2; \
ldr r2, =const_size; \
bl assert_memcmp; \
bl lkmc_assert_memcmp; \
cmp r0, 0; \
ASSERT(beq); \
LKMC_ASSERT(beq); \
;
/* Store all callee saved registers, and LR in case we make further BL calls.
@@ -44,7 +44,7 @@
* Also save the input arguments r0-r3 on the stack, so we can access them later on,
* despite those registers being overwritten.
*/
#define ENTRY \
#define LKMC_ENTRY \
.text; \
.global asm_main; \
asm_main: \
@@ -52,15 +52,15 @@ asm_main: \
asm_main_after_prologue: \
;
/* Meant to be called at the end of ENTRY.*
/* Meant to be called at the end of LKMC_ENTRY.*
*
* Branching to "fail" makes tests fail with exit status 1.
*
* If EXIT is reached, the program ends successfully.
* If LKMC_EXIT is reached, the program ends successfully.
*
* Restore LR and bx jump to it to return from asm_main.
*/
#define EXIT \
#define LKMC_EXIT \
mov r0, 0; \
mov r1, 0; \
b pass; \
@@ -75,16 +75,9 @@ pass: \
;
/* Always fail. */
#define FAIL \
#define LKMC_FAIL \
ldr r0, =__LINE__; \
b fail; \
;
#define MEMCMP(s1, s2, n) \
ldr r0, =s1; \
ldr r1, =s2; \
ldr r2, =n; \
bl memcmp; \
;
#endif

8
userland/arch/arm/cond.S
View File

@@ -2,15 +2,15 @@
#include "common.h"
ENTRY
LKMC_ENTRY
mov r0, 0
mov r1, 1
cmp r0, 1
/* Previous cmp failed, skip this operation. */
addeq r1, 1
ASSERT_EQ(r1, 1)
LKMC_ASSERT_EQ(r1, 1)
cmp r0, 0
/* Previous passed, do this operation. */
addeq r1, 1
ASSERT_EQ(r1, 2)
EXIT
LKMC_ASSERT_EQ(r1, 2)
LKMC_EXIT

6
userland/arch/arm/gas_data_sizes.S
View File

@@ -14,12 +14,12 @@ myquad:
myocta:
.octa 0x123456789ABCDEF0123456789ABCDEF0
theend:
ENTRY
LKMC_ENTRY
#define ASSERT_DIFF(label1, label2, result) \
ldr r0, =label1; \
ldr r1, =label2; \
sub r0, r1, r0; \
ASSERT_EQ(r0, result)
LKMC_ASSERT_EQ(r0, result)
ASSERT_DIFF(mybyte, myword, 1)
ASSERT_DIFF(myword, mylong, 4)
@@ -27,4 +27,4 @@ ENTRY
ASSERT_DIFF(myquad, myocta, 8)
ASSERT_DIFF(myocta, theend, 16)
#undef ASSERT_DIF
EXIT
LKMC_EXIT

4
userland/arch/arm/immediates.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* This is the default. We hack it in common.h however. */
.syntax divided
/* These fail. */
@@ -21,4 +21,4 @@ ENTRY
mov r0, 0x1
mov r0, $1
mov r0, $0x1
EXIT
LKMC_EXIT

6
userland/arch/arm/inc_array.S
View File

@@ -11,7 +11,7 @@ my_array:
my_array_expect:
.word 0x11111112, 0x22222223, 0x33333334, 0x44444445
ENTRY
LKMC_ENTRY
/* Increment. */
ldr r0, =my_array
mov r1, NELEM
@@ -23,5 +23,5 @@ increment:
sub r1, 1
cmp r1, 0
bne increment
ASSERT_MEMCMP(my_array, my_array_expect, 0x10)
EXIT
LKMC_ASSERT_MEMCMP(my_array, my_array_expect, 0x10)
LKMC_EXIT

22
userland/arch/arm/ldmia.S
View File

@@ -11,7 +11,7 @@ my_array_0:
my_array_1:
.word 0x55555555, 0x66666666, 0x77777777, 0x88888888
ENTRY
LKMC_ENTRY
/* Load r5, r6, r7 and r8 starting from the address in r4. Don't change r4 */
ldr r4, =my_array_0
@@ -20,11 +20,11 @@ ENTRY
ldr r7, =0
ldr r8, =0
ldmia r4, {r5-r8}
ASSERT_EQ(r4, my_array_0)
ASSERT_EQ(r5, 0x11111111)
ASSERT_EQ(r6, 0x22222222)
ASSERT_EQ(r7, 0x33333333)
ASSERT_EQ(r8, 0x44444444)
LKMC_ASSERT_EQ(r4, my_array_0)
LKMC_ASSERT_EQ(r5, 0x11111111)
LKMC_ASSERT_EQ(r6, 0x22222222)
LKMC_ASSERT_EQ(r7, 0x33333333)
LKMC_ASSERT_EQ(r8, 0x44444444)
/* Swapping the order of r5 and r6 on the mnemonic makes no difference to load order.
*
@@ -38,8 +38,8 @@ ENTRY
ldr r5, =0
ldr r6, =0
ldmia r4, {r6,r5}
ASSERT_EQ(r5, 0x11111111)
ASSERT_EQ(r6, 0x22222222)
LKMC_ASSERT_EQ(r5, 0x11111111)
LKMC_ASSERT_EQ(r6, 0x22222222)
#endif
/* Modify the array */
@@ -51,11 +51,11 @@ ENTRY
stmdb r4, {r5-r8}
/* Verify that my_array_0 changed and is equal to my_array_1. */
ASSERT_MEMCMP(my_array_0, my_array_1, 0x10)
LKMC_ASSERT_MEMCMP(my_array_0, my_array_1, 0x10)
/* Load registers and increment r4. */
ldr r4, =my_array_0
ldmia r4!, {r5-r8}
ASSERT_EQ(r4, my_array_1)
LKMC_ASSERT_EQ(r4, my_array_1)
EXIT
LKMC_EXIT

16
userland/arch/arm/ldr_pseudo.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Mnemonic for a PC relative load:
*
@@ -12,13 +12,13 @@ ENTRY
* ....
*/
ldr r0, myvar
ASSERT_EQ(r0, 0x12345678)
LKMC_ASSERT_EQ(r0, 0x12345678)
/* Mnemonic PC relative load with an offset.
* Load myvar2 instead of myvar.
*/
ldr r0, myvar + 4
ASSERT_EQ(r0, 0x9ABCDEF0)
LKMC_ASSERT_EQ(r0, 0x9ABCDEF0)
/* First store the address in r0 using a magic =myvar, which creates
* a new variable containing the address and PC-relative addresses it
@@ -33,17 +33,17 @@ ENTRY
*/
ldr r0, =myvar
ldr r1, [r0]
ASSERT_EQ(r1, 0x12345678)
LKMC_ASSERT_EQ(r1, 0x12345678)
/* More efficiently, use r0 as the address to read, and write to r0 itself. */
ldr r0, =myvar
ldr r0, [r0]
ASSERT_EQ(r0, 0x12345678)
LKMC_ASSERT_EQ(r0, 0x12345678)
/* Same as =myvar but store a constant to a register.
* Can also be done with movw and movt. */
ldr r0, =0x11112222
ASSERT_EQ(r0, 0x11112222)
LKMC_ASSERT_EQ(r0, 0x11112222)
/* We can also use GAS tolower16 and topper16 and movw and movt
* to load the address of myvar into r0 with two immediates.
@@ -56,9 +56,9 @@ ENTRY
movw r0, #:lower16:myvar
movt r0, #:upper16:myvar
ldr r1, [r0]
ASSERT_EQ(r1, 0x12345678)
LKMC_ASSERT_EQ(r1, 0x12345678)
EXIT
LKMC_EXIT
myvar:
.word 0x12345678
myvar2:

6
userland/arch/arm/ldrb.S
View File

@@ -2,11 +2,11 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr r0, =myvar
mov r1, 0x0
ldrb r1, [r0]
ASSERT_EQ(r1, 0x00000078)
EXIT
LKMC_ASSERT_EQ(r1, 0x00000078)
LKMC_EXIT
myvar:
.word 0x12345678

6
userland/arch/arm/ldrh.S
View File

@@ -2,11 +2,11 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr r0, =myvar
mov r1, 0x0
ldrh r1, [r0]
ASSERT_EQ(r1, 0x00005678)
EXIT
LKMC_ASSERT_EQ(r1, 0x00005678)
LKMC_EXIT
myvar:
.word 0x12345678

12
userland/arch/arm/linux/c_from_asm.S
View File

@@ -12,21 +12,21 @@ my_array_0:
my_array_1:
.word 0x55555555, 0x66666666, 0x77777777, 0x88888888
ENTRY
LKMC_ENTRY
/* puts("hello world") */
/* r0 is first argument. */
ldr r0, =puts_s
bl puts
/* Check exit status >= 0 for success. */
cmp r0, 0
ASSERT(bge)
LKMC_ASSERT(bge)
/* printf */
ldr r0, =printf_format
ldr r1, =0x12345678
bl printf
cmp r0, 0
ASSERT(bge)
LKMC_ASSERT(bge)
/* memcpy and memcmp. */
@@ -36,7 +36,7 @@ ENTRY
ldr r2, =0x10
bl memcmp
cmp r0, 0
ASSERT(blt)
LKMC_ASSERT(blt)
/* Copy. */
ldr r0, =my_array_0
@@ -49,11 +49,11 @@ ENTRY
ldr r1, =my_array_1
ldr r2, =0x10
bl memcmp
ASSERT_EQ(r0, 0)
LKMC_ASSERT_EQ(r0, 0)
/* exit(0) */
mov r0, 0
bl exit
/* Never reached, just for the fail symbol. */
EXIT
LKMC_EXIT

10
userland/arch/arm/mov.S
View File

@@ -2,18 +2,18 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Immediate. */
mov r0, 0
ASSERT_EQ(r0, 0)
LKMC_ASSERT_EQ(r0, 0)
mov r0, 1
ASSERT_EQ(r0, 1)
LKMC_ASSERT_EQ(r0, 1)
/* Register. */
mov r0, 0
mov r1, 1
mov r1, r0
ASSERT_EQ(r1, 0)
LKMC_ASSERT_EQ(r1, 0)
EXIT
LKMC_EXIT

8
userland/arch/arm/movw.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* movt (top) and movw (TODO what is w) set the higher
* and lower 16 bits of the register.
@@ -10,7 +10,7 @@ ENTRY
movw r0, 0xFFFF
movt r0, 0x1234
add r0, 1
ASSERT_EQ(r0, 0x12350000)
LKMC_ASSERT_EQ(r0, 0x12350000)
/* movw also zeroes out the top bits, allowing small 16-bit
* C constants to be assigned in a single instruction.
@@ -22,6 +22,6 @@ ENTRY
*/
ldr r0, =0x12345678
movw r0, 0x1111
ASSERT_EQ(r0, 0x00001111)
LKMC_ASSERT_EQ(r0, 0x00001111)
EXIT
LKMC_EXIT

6
userland/arch/arm/mul.S
View File

@@ -5,11 +5,11 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 2 * 3 = 6 */
mov r0, 0
mov r1, 2
mov r2, 3
mul r1, r2
ASSERT_EQ(r1, 6)
EXIT
LKMC_ASSERT_EQ(r1, 6)
LKMC_EXIT

4
userland/arch/arm/nop.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Disassembles as:
*
* ....
@@ -29,4 +29,4 @@ ENTRY
/* And there are other nops as well? Disassembles as `and`. */
and r0, r0, r0
EXIT
LKMC_EXIT

10
userland/arch/arm/push.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Save sp before push. */
mov r4, sp
@@ -19,13 +19,13 @@ ENTRY
mov r7, 0
mov r8, 0
pop {r7, r8}
ASSERT_EQ(r7, 1)
ASSERT_EQ(r8, 2)
LKMC_ASSERT_EQ(r7, 1)
LKMC_ASSERT_EQ(r8, 2)
/* Check that stack pointer moved down by 8 bytes
* (2 registers x 4 bytes each).
*/
sub r4, r5
ASSERT_EQ(r4, 8)
LKMC_ASSERT_EQ(r4, 8)
EXIT
LKMC_EXIT

6
userland/arch/arm/rbit.S
View File

@@ -5,8 +5,8 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr r0, =0b00000001001000110100010101100101
rbit r1, r0
ASSERT_EQ(r1, 0b10100110101000101100010010000000)
EXIT
LKMC_ASSERT_EQ(r1, 0b10100110101000101100010010000000)
LKMC_EXIT

12
userland/arch/arm/registers.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 13 general purpose registers. */
mov r0, 0
@@ -39,12 +39,12 @@ ENTRY
* https://stackoverflow.com/questions/32304646/arm-assembly-branch-to-address-inside-register-or-memory/54145818#54145818
*/
ldr pc, =10f
FAIL
LKMC_FAIL
10:
/* Same with r15, which is the same as pc. */
ldr r15, =10f
FAIL
LKMC_FAIL
10:
/* Another example with mov reading from pc. */
@@ -60,10 +60,10 @@ pc_addr:
b 1f
.word 0x12345678
1:
ASSERT_EQ(r0, 0x12345678)
LKMC_ASSERT_EQ(r0, 0x12345678)
/* We can also use fp in GNU GAS assembly. */
mov r11, 0
mov fp, 1
ASSERT_EQ(r11, 1)
EXIT
LKMC_ASSERT_EQ(r11, 1)
LKMC_EXIT

8
userland/arch/arm/rev.S
View File

@@ -5,14 +5,14 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* All bytes in register. */
ldr r0, =0x11223344
rev r1, r0
ASSERT_EQ(r1, 0x44332211)
LKMC_ASSERT_EQ(r1, 0x44332211)
/* Groups of 16-bits. */
ldr r0, =0x11223344
rev16 r1, r0
ASSERT_EQ(r1, 0x22114433)
EXIT
LKMC_ASSERT_EQ(r1, 0x22114433)
LKMC_EXIT

16
userland/arch/arm/s_suffix.S
View File

@@ -2,34 +2,34 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Result is 0, set beq. */
movs r0, 0
ASSERT(beq)
LKMC_ASSERT(beq)
/* The opposite. */
movs r0, 1
ASSERT(bne)
LKMC_ASSERT(bne)
/* mov without s does not set the status. */
movs r0, 0
mov r0, 1
ASSERT(beq)
LKMC_ASSERT(beq)
/* movs still moves... */
mov r0, 0
movs r0, 1
ASSERT_EQ(r0, 1)
LKMC_ASSERT_EQ(r0, 1)
/* add: the result is 0. */
mov r0, 1
adds r0, -1
ASSERT(beq)
LKMC_ASSERT(beq)
/* add: result non 0. */
mov r0, 1
adds r0, 1
ASSERT(bne)
LKMC_ASSERT(bne)
EXIT
LKMC_EXIT

20
userland/arch/arm/shift.S
View File

@@ -2,37 +2,37 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* lsr */
ldr r0, =0xFFF00FFF
mov r1, r0, lsl 8
ldr r2, =0xF00FFF00
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* lsl */
ldr r0, =0xFFF00FFF
mov r1, r0, lsr 8
ldr r2, =0x00FFF00F
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* ror */
ldr r0, =0xFFF00FFF
mov r1, r0, ror 8
ldr r2, =0xFFFFF00F
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* asr negative */
ldr r0, =0x80000008
mov r1, r0, asr 1
ldr r2, =0xC0000004
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* asr positive */
ldr r0, =0x40000008
mov r1, r0, asr 1
ldr r2, =0x20000004
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* There are also direct shift mnemonics for the mov shifts.
*
@@ -41,7 +41,7 @@ ENTRY
ldr r0, =0xFFF00FFF
lsl r1, r0, 8
ldr r2, =0xF00FFF00
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* If used with the `mov` instruction, it results in a pure shift,
* but the suffixes also exist for all the other data processing instructions.
@@ -56,7 +56,7 @@ ENTRY
ldr r1, =0x100
add r1, r1, r0, lsl 1
ldr r2, =0x00000120
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* The shift takes up the same encoding slot as the immediate,
* therefore it is not possible to both use an immediate and shift.
@@ -74,6 +74,6 @@ ENTRY
ldr r1, =0x100
add r1, r1, (0x10 << 1)
ldr r2, =0x00000120
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
EXIT
LKMC_EXIT

8
userland/arch/arm/str.S
View File

@@ -7,13 +7,13 @@
myvar:
.word 0x12345678
ENTRY
LKMC_ENTRY
/* Sanity check. */
ldr r0, =myvar
ldr r1, [r0]
movw r2, 0x5678
movt r2, 0x1234
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* Modify the value. */
ldr r0, =myvar
@@ -26,7 +26,7 @@ ENTRY
ldr r1, [r0]
movw r2, 0xDEF0
movt r2, 0x9ABC
ASSERT_EQ_REG(r1, r2)
LKMC_ASSERT_EQ_REG(r1, r2)
/* Cannot use PC relative addressing to a different segment,
* or else it fails with:
@@ -57,4 +57,4 @@ var_in_same_section:
str r1, =myvar
#endif
EXIT
LKMC_EXIT

6
userland/arch/arm/sub.S
View File

@@ -5,10 +5,10 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 3 - 2 == 1 , register version.*/
mov r0, 3
mov r1, 2
sub r0, r0, r1
ASSERT_EQ(r0, 1)
EXIT
LKMC_ASSERT_EQ(r0, 1)
LKMC_EXIT

10
userland/arch/arm/tst.S
View File

@@ -5,18 +5,18 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 0x0F && 0xF0 == 0x00, so beq. */
mov r0, 0x0F
tst r0, 0xF0
ASSERT(beq)
LKMC_ASSERT(beq)
/* bne */
mov r0, 0xFF
tst r0, 0x0F
ASSERT(bne)
LKMC_ASSERT(bne)
# r0 was not modified.
ASSERT_EQ(r0, 0xFF)
LKMC_ASSERT_EQ(r0, 0xFF)
EXIT
LKMC_EXIT

4
userland/arch/arm/udf.S
View File

@@ -2,6 +2,6 @@
#include "common.h"
ENTRY
LKMC_ENTRY
udf 0
EXIT
LKMC_EXIT

12
userland/arch/arm/vadd_scalar.S
View File

@@ -3,7 +3,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Minimal single precision floating point example.
* TODO: floating point representation constraints due to 4-byte instruction?
*/
@@ -18,7 +18,7 @@ ENTRY
/* Move the nzcv bits from fpscr to apsr */
vmrs apsr_nzcv, fpscr
/* This branch uses the Z bit of apsr, which was set accordingly. */
ASSERT(beq)
LKMC_ASSERT(beq)
/* Now the same from memory with vldr and vstr. */
.data
@@ -39,7 +39,7 @@ my_float_sum:
vadd.f32 s2, s0, s1
ldr r0, =my_float_sum
vstr.f32 s2, [r0]
ASSERT_MEMCMP(my_float_sum, my_float_sum_expect, 4)
LKMC_ASSERT_MEMCMP(my_float_sum, my_float_sum_expect, 4)
#if 0
/* We can't do pseudo vldr as for ldr, fails with:
@@ -56,7 +56,7 @@ my_float_sum:
vmov.f64 d3, 4.0
vcmp.f64 d2, d3
vmrs apsr_nzcv, fpscr
ASSERT(beq)
LKMC_ASSERT(beq)
/* vmov can also move to general purpose registers.
*
@@ -68,5 +68,5 @@ my_float_sum:
vmov s0, r0
vmov s1, s0
vmov r1, s1
ASSERT_EQ_REG(r0, r1)
EXIT
LKMC_ASSERT_EQ_REG(r0, r1)
LKMC_EXIT

8
userland/arch/arm/vadd_vector.S
View File

@@ -4,7 +4,7 @@
.bss
output: .skip 16
ENTRY
LKMC_ENTRY
/* Integer. */
.data
input0_u: .long 0xF1F1F1F1, 0xF2F2F2F2, 0xF3F3F3F3, 0xF4F4F4F4
@@ -20,7 +20,7 @@ ENTRY
vadd.u ## size q2, q0, q1; \
ldr r0, =output; \
vst1.u ## size {q2}, [r0]; \
ASSERT_MEMCMP(output, expect_u_ ## size, 0x10)
LKMC_ASSERT_MEMCMP(output, expect_u_ ## size, 0x10)
/* vadd.u32
*
@@ -54,7 +54,7 @@ ENTRY
vadd.f ## size q2, q0, q1; \
ldr r0, =output; \
vst1. ## size {q2}, [r0]; \
ASSERT_MEMCMP(output, expect_f_ ## size, 0x10)
LKMC_ASSERT_MEMCMP(output, expect_f_ ## size, 0x10)
/* 4x 32-bit. */
TEST(32)
@@ -68,4 +68,4 @@ ENTRY
TEST(64)
#endif
#undef TEST
EXIT
LKMC_EXIT

16
userland/arch/arm/vcvt.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* SIMD positive. */
.data
vcvt_positive_0: .float 1.25, 2.5, 3.75, 4.0
@@ -15,7 +15,7 @@ ENTRY
vcvt.u32.f32 q1, q0
ldr r0, =vcvt_positive_result
vst1.32 {q1}, [r0]
ASSERT_MEMCMP(vcvt_positive_result, vcvt_positive_expect, 0x10)
LKMC_ASSERT_MEMCMP(vcvt_positive_result, vcvt_positive_expect, 0x10)
/* SIMD negative. */
.data
@@ -29,7 +29,7 @@ ENTRY
vcvt.s32.f32 q1, q0
ldr r0, =vcvt_negative_result
vst1.32 {q1}, [r0]
ASSERT_MEMCMP(vcvt_negative_result, vcvt_negative_expect, 0x10)
LKMC_ASSERT_MEMCMP(vcvt_negative_result, vcvt_negative_expect, 0x10)
/* Floating point. */
.data
@@ -44,7 +44,7 @@ ENTRY
vcvt.u32.f32 s0, s0
ldr r0, =vcvt_positive_float_result
vst1.32 {d0}, [r0]
ASSERT_MEMCMP(vcvt_positive_float_result, vcvt_positive_float_expect, 0x8)
LKMC_ASSERT_MEMCMP(vcvt_positive_float_result, vcvt_positive_float_expect, 0x8)
/* Floating point but with immediates.
*
@@ -63,12 +63,12 @@ ENTRY
vmov.i32 d1, 1
vcmp.f32 s0, s2
vmrs apsr_nzcv, fpscr
ASSERT(beq)
LKMC_ASSERT(beq)
/* Check that s1 wasn't modified by vcvt. */
vmov.f32 s2, 1.5
vcmp.f32 s1, s2
vmrs apsr_nzcv, fpscr
ASSERT(beq)
LKMC_ASSERT(beq)
/* Floating point double precision. */
.data
@@ -82,9 +82,9 @@ ENTRY
vcvt.u32.f64 s0, d0
ldr r0, =vcvt_positive_double_result
vst1.32 {d0}, [r0]
ASSERT_MEMCMP(
LKMC_ASSERT_MEMCMP(
vcvt_positive_double_result,
vcvt_positive_double_expect,
0x4
)
EXIT
LKMC_EXIT

8
userland/arch/arm/vcvta.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* SIMD positive. */
.data
vcvta_positive_0: .float 1.25, 2.5, 3.75, 4.0
@@ -15,7 +15,7 @@ ENTRY
vcvta.u32.f32 q1, q0
ldr r0, =vcvta_positive_result
vst1.32 {q1}, [r0]
ASSERT_MEMCMP(
LKMC_ASSERT_MEMCMP(
vcvta_positive_result,
vcvta_positive_expect,
0x10
@@ -33,9 +33,9 @@ ENTRY
vcvta.s32.f32 q1, q0
ldr r0, =vcvta_negative_result
vst1.32 {q1}, [r0]
ASSERT_MEMCMP(
LKMC_ASSERT_MEMCMP(
vcvta_negative_result,
vcvta_negative_expect,
0x10
)
EXIT
LKMC_EXIT

8
userland/arch/arm/vcvtr.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
.data
vcvtr_0: .float 1.25, 2.5, 3.75, 4.0
vcvtr_expect_zero: .word 1, 2, 3, 4
@@ -21,7 +21,7 @@ ENTRY
vcvtr.u32.f32 q1, q0
ldr r0, =vcvtr_result_zero
vst1.32 {q1}, [r0]
ASSERT_MEMCMP(
LKMC_ASSERT_MEMCMP(
vcvtr_result_zero,
vcvtr_expect_zero,
0x10
@@ -37,10 +37,10 @@ ENTRY
vcvtr.u32.f32 q1, q0
ldr r0, =vcvtr_result_plus_infinity
vst1.32 {q1}, [r0]
ASSERT_MEMCMP(
LKMC_ASSERT_MEMCMP(
vcvtr_result_plus_infinity,
vcvtr_expect_plus_infinity,
0x10
)
#endif
EXIT
LKMC_EXIT