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userland: scope every header identifier with lkmc_

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This commit is contained in:
Ciro Santilli 六四事件 法轮功
2019-05-21 00:00:01 +00:00
parent 6fe9e5bae7
commit 72200dee4e
78 changed files with 369 additions and 377 deletions
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6
userland/arch/aarch64/add.S
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@@ -2,8 +2,8 @@
#include "common.h"
ENTRY
LKMC_ENTRY
mov x0, 1
add x1, x0, 2
ASSERT_EQ(x1, 3)
EXIT
LKMC_ASSERT_EQ(x1, 3)
LKMC_EXIT

6
userland/arch/aarch64/add_vector.S
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@@ -5,7 +5,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
.data
input0: .long 0xF1F1F1F1, 0xF2F2F2F2, 0xF3F3F3F3, 0xF4F4F4F4
input1: .long 0x12121212, 0x13131313, 0x14141414, 0x15151515
@@ -22,11 +22,11 @@ ENTRY
add v2. ## size, v0. ## size, v1. ## size; \
adr x0, output; \
st1 {v2. ## size}, [x0]; \
ASSERT_MEMCMP(output, expect_ ## size, 0x10)
LKMC_ASSERT_MEMCMP(output, expect_ ## size, 0x10)
/* 4x 32-bit */
TEST(4s)
/* 2x 64-bit */
TEST(2d)
#undef TEST
EXIT
LKMC_EXIT

6
userland/arch/aarch64/adr.S
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@@ -5,7 +5,7 @@
.data
data_label:
.word 0x1234678
ENTRY
LKMC_ENTRY
/* This is not possible in v7 because the label is in another section.
* objdump says that this generates a R_AARCH64_ADR_PRE relocation.
* which looks specific to ADR, and therefore makes it more likely
@@ -17,5 +17,5 @@ ENTRY
adr x0, data_label
ldr x1, =data_label
label:
ASSERT_EQ_REG(x0, x1)
EXIT
LKMC_ASSERT_EQ_REG(x0, x1)
LKMC_EXIT

6
userland/arch/aarch64/adrp.S
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@@ -2,12 +2,12 @@
#include "common.h"
ENTRY
LKMC_ENTRY
adrp x0, label
adr x1, label
label:
/* Clear the lower 12 bits. */
bic x1, x1, 0xFF
bic x1, x1, 0xF00
ASSERT_EQ_REG(x0, x1)
EXIT
LKMC_ASSERT_EQ_REG(x0, x1)
LKMC_EXIT

12
userland/arch/aarch64/beq.S
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@@ -2,11 +2,11 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* cbz == 0 */
mov x0, 0
cbz x0, 1f
FAIL
LKMC_FAIL
1:
/* cbz != 0 */
@@ -14,13 +14,13 @@ ENTRY
cbz x0, 1f
b 2f
1:
FAIL
LKMC_FAIL
2:
/* cbnz != 0 */
mov x0, 1
cbnz x0, 1f
FAIL
LKMC_FAIL
1:
/* cbnz == 0 */
@@ -28,6 +28,6 @@ ENTRY
cbnz x0, 1f
b 2f
1:
FAIL
LKMC_FAIL
2:
EXIT
LKMC_EXIT

6
userland/arch/aarch64/bfi.S
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@@ -2,10 +2,10 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr x0, =0x1122334455667788
ldr x1, =0xFFFFFFFFFFFFFFFF
bfi x1, x0, 16, 32
ASSERT_EQ(x1, 0xFFFF55667788FFFF)
EXIT
LKMC_ASSERT_EQ(x1, 0xFFFF55667788FFFF)
LKMC_EXIT

8
userland/arch/aarch64/cbz.S
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@@ -2,18 +2,18 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Branch. */
mov x0, 0x0
cbz x0, ok
FAIL
LKMC_FAIL
ok:
/* Don't branch. */
mov x0, 0x1
cbz x0, ko
EXIT
LKMC_EXIT
ko:
FAIL
LKMC_FAIL

4
userland/arch/aarch64/comments.S
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@@ -1,7 +1,7 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#gnu-gas-assembler-comments */
#include "common.h"
ENTRY
LKMC_ENTRY
# mycomment
/* ARMv8 has // instead of @ as for comments. */
@@ -14,4 +14,4 @@ ENTRY
@ mycomment
nop @ mycomment
#endif
EXIT
LKMC_EXIT

30
userland/arch/aarch64/common_arch.h
View File

@@ -3,42 +3,42 @@
#ifndef COMMON_ARCH_H
#define COMMON_ARCH_H
#define ASSERT_EQ(reg, const) \
#define LKMC_ASSERT_EQ(reg, const) \
mov x0, reg; \
ldr x1, =const; \
ASSERT_EQ_DO(64); \
LKMC_ASSERT_EQ_DO(64); \
;
#define ASSERT_EQ_DO(bits) \
bl assert_eq_ ## bits; \
#define LKMC_ASSERT_EQ_DO(bits) \
bl lkmc_assert_eq_ ## bits; \
cmp x0, 0; \
ASSERT(beq); \
LKMC_ASSERT(beq); \
;
#define ASSERT_EQ_REG(reg1, reg2) \
#define LKMC_ASSERT_EQ_REG(reg1, reg2) \
str reg2, [sp, -16]!; \
mov x0, reg1; \
ldr x1, [sp], 16; \
ASSERT_EQ_DO(64); \
LKMC_ASSERT_EQ_DO(64); \
;
#define ASSERT_EQ_REG_32(reg1, reg2) \
#define LKMC_ASSERT_EQ_REG_32(reg1, reg2) \
str reg2, [sp, -4]!; \
mov w0, reg1; \
ldr w1, [sp], 4; \
ASSERT_EQ_DO(32); \
LKMC_ASSERT_EQ_DO(32); \
;
#define ASSERT_MEMCMP(label1, label2, const_size) \
#define LKMC_ASSERT_MEMCMP(label1, label2, const_size) \
adr x0, label1; \
adr x1, label2; \
ldr x2, =const_size; \
bl assert_memcmp; \
bl lkmc_assert_memcmp; \
cmp x0, 0; \
ASSERT(beq); \
LKMC_ASSERT(beq); \
;
#define ENTRY \
#define LKMC_ENTRY \
.text; \
.global asm_main; \
asm_main: \
@@ -56,7 +56,7 @@ asm_main: \
asm_main_after_prologue: \
;
#define EXIT \
#define LKMC_EXIT \
mov w0, 0; \
mov w1, 0; \
b pass; \
@@ -75,7 +75,7 @@ pass: \
ret; \
;
#define FAIL \
#define LKMC_FAIL \
ldr w0, =__LINE__; \
b fail; \
;

12
userland/arch/aarch64/cset.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* Test values. */
mov x19, 0
mov x20, 1
@@ -10,19 +10,19 @@ ENTRY
/* eq is true, set x21 = 1. */
cmp x19, x19
cset x21, eq
ASSERT_EQ(x21, 1)
LKMC_ASSERT_EQ(x21, 1)
/* eq is false, set x21 = 0. */
cmp x19, x20
cset x21, eq
ASSERT_EQ(x21, 0)
LKMC_ASSERT_EQ(x21, 0)
/* Same for ne. */
cmp x19, x19
cset x21, ne
ASSERT_EQ(x21, 0)
LKMC_ASSERT_EQ(x21, 0)
cmp x19, x20
cset x21, ne
ASSERT_EQ(x21, 1)
EXIT
LKMC_ASSERT_EQ(x21, 1)
LKMC_EXIT

10
userland/arch/aarch64/fadd_scalar.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 1.5 + 2.5 == 4.0
* using 64-bit double immediates.
*/
@@ -14,7 +14,7 @@ ENTRY
* automatically in the main CPSR.
*/
fcmp d2, d3
ASSERT(beq)
LKMC_ASSERT(beq)
/* Now with a memory stored value. */
.data
@@ -30,7 +30,7 @@ my_double_sum_expect:
fadd d2, d0, d1
ldr d3, my_double_sum_expect
fcmp d2, d3
ASSERT(beq)
LKMC_ASSERT(beq)
/* Now in 32-bit. */
fmov s0, 1.5
@@ -38,7 +38,7 @@ my_double_sum_expect:
fadd s2, s0, s1
fmov s3, 4.0
fcmp s2, s3
ASSERT(beq)
LKMC_ASSERT(beq)
/* TODO why? What's the point of q then?
* Error: operand mismatch -- `fmov q0,1.5'
@@ -57,4 +57,4 @@ my_double_sum_expect:
#if 0
fmov d0, 1.23456798
#endif
EXIT
LKMC_EXIT

6
userland/arch/aarch64/fadd_vector.S
View File

@@ -5,7 +5,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
.data
input0_4s: .float 1.5, 2.5, 3.5, 4.5
input1_4s: .float 5.5, 6.5, 7.5, 8.5
@@ -24,11 +24,11 @@ ENTRY
fadd v2. ## size, v0. ## size, v1. ## size; \
adr x0, output; \
st1 {v2. ## size}, [x0]; \
ASSERT_MEMCMP(output, expect_ ## size, 0x10)
LKMC_ASSERT_MEMCMP(output, expect_ ## size, 0x10)
/* 4x 32-bit */
TEST(4s)
/* 2x 64-bit */
TEST(2d)
#undef TEST
EXIT
LKMC_EXIT

6
userland/arch/aarch64/gas_data_sizes.S
View File

@@ -2,12 +2,12 @@
#include "common.h"
ENTRY
LKMC_ENTRY
#define ASSERT_DIFF(label1, label2, result) \
adr x0, label1; \
adr x1, label2; \
sub x0, x1, x0; \
ASSERT_EQ(x0, result)
LKMC_ASSERT_EQ(x0, result)
ASSERT_DIFF(mybyte, myword, 1)
ASSERT_DIFF(myword, mylong, 4)
@@ -15,7 +15,7 @@ ENTRY
ASSERT_DIFF(myquad, myocta, 8)
ASSERT_DIFF(myocta, theend, 16)
#undef ASSERT_DIF
EXIT
LKMC_EXIT
mybyte:
.byte 0x12
myword:

4
userland/arch/aarch64/immediates.S
View File

@@ -1,9 +1,9 @@
/* https://github.com/cirosantilli/linux-kernel-module-cheat#gnu-gas-assembler-immediates */
#include "common.h"
ENTRY
LKMC_ENTRY
mov x0, 1
mov x0, 0x1
mov x0, 1
mov x0, 0x1
EXIT
LKMC_EXIT

6
userland/arch/aarch64/ld2.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
.data
u32_interleave: .word \
0x11111111, 0x55555555, \
@@ -22,5 +22,5 @@ ENTRY
add v2.4s, v0.4s, v1.4s
adr x0, u32_interleave_sum
st1 {v2.4s}, [x0]
ASSERT_MEMCMP(u32_interleave_sum, u32_interleave_sum_expect, 0x10)
EXIT
LKMC_ASSERT_MEMCMP(u32_interleave_sum, u32_interleave_sum_expect, 0x10)
LKMC_EXIT

8
userland/arch/aarch64/movk.S
View File

@@ -2,12 +2,12 @@
#include "common.h"
ENTRY
LKMC_ENTRY
movk x0, 0x4444, lsl 0
movk x0, 0x3333, lsl 16
movk x0, 0x2222, lsl 32
movk x0, 0x1111, lsl 48
ASSERT_EQ(x0, 0x1111222233334444)
LKMC_ASSERT_EQ(x0, 0x1111222233334444)
/* Set a label (addresses are 48-bit) with immediates:
*
@@ -22,5 +22,5 @@ ENTRY
movk x0, :abs_g0_nc:label /* bits 0-15, no overflow check */
adr x1, label
label:
ASSERT_EQ_REG(x0, x1)
EXIT
LKMC_ASSERT_EQ_REG(x0, x1)
LKMC_EXIT

6
userland/arch/aarch64/movn.S
View File

@@ -2,8 +2,8 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr x0, =0x123456789ABCDEF0
movn x0, 0x8888, lsl 16
ASSERT_EQ(x0, 0xFFFFFFFF7777FFFF)
EXIT
LKMC_ASSERT_EQ(x0, 0xFFFFFFFF7777FFFF)
LKMC_EXIT

18
userland/arch/aarch64/pc.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
#if 0
/* Unlike v7, we can't use PC like any other register in ARMv8,
* since it is not a general purpose register anymore.
@@ -16,7 +16,7 @@ ENTRY
* exception return.
*/
ldr pc, =10f
FAIL
LKMC_FAIL
10:
#endif
#if 0
@@ -32,7 +32,7 @@ ENTRY
pc_relative_ldr:
.quad 0x123456789ABCDEF0
1:
ASSERT_EQ(x0, 0x123456789ABCDEF0)
LKMC_ASSERT_EQ(x0, 0x123456789ABCDEF0)
/* Just for fun, we can also use relative numbers instead of labels.
* https://reverseengineering.stackexchange.com/questions/17666/how-does-the-ldr-instruction-work-on-arm/20567#20567
@@ -41,14 +41,14 @@ pc_relative_ldr:
b 1f
.quad 0x123456789ABCDEF0
1:
ASSERT_EQ(x0, 0x123456789ABCDEF0)
LKMC_ASSERT_EQ(x0, 0x123456789ABCDEF0)
/* Analogous for b with PC. */
mov x0, 0
/* Jumps over mov to ASSERT_EQ. */
/* Jumps over mov to LKMC_ASSERT_EQ. */
b 8
mov x0, 1
ASSERT_EQ(x0, 0)
LKMC_ASSERT_EQ(x0, 0)
/* Trying to use the old "LDR (immediate)" PC-relative
* syntax does not work.
@@ -66,13 +66,13 @@ pc_relative_ldr:
/* You just have to use adr + "STR (register)". */
ldr x0, pc_relative_str
ASSERT_EQ(x0, 0x0)
LKMC_ASSERT_EQ(x0, 0x0)
adr x1, pc_relative_str
ldr x0, pc_relative_ldr
str x0, [x1]
ldr x0, pc_relative_str
ASSERT_EQ(x0, 0x123456789ABCDEF0)
EXIT
LKMC_ASSERT_EQ(x0, 0x123456789ABCDEF0)
LKMC_EXIT
.data
pc_relative_str:
.quad 0x0000000000000000

6
userland/arch/aarch64/registers.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* 31 64-bit eXtended general purpose registers. */
mov x0, 0
@@ -43,5 +43,5 @@ ENTRY
ldr x0, =0x1111222233334444
ldr x1, =0x5555666677778888
mov w0, w1
ASSERT_EQ(x0, 0x0000000077778888)
EXIT
LKMC_ASSERT_EQ(x0, 0x0000000077778888)
LKMC_EXIT

10
userland/arch/aarch64/ret.S
View File

@@ -2,15 +2,15 @@
#include "common.h"
ENTRY
LKMC_ENTRY
mov x19, 1
bl inc
ASSERT_EQ(x19, 2)
LKMC_ASSERT_EQ(x19, 2)
bl inc2
ASSERT_EQ(x19, 3)
LKMC_ASSERT_EQ(x19, 3)
bl inc3
ASSERT_EQ(x19, 4)
EXIT
LKMC_ASSERT_EQ(x19, 4)
LKMC_EXIT
/* void inc(uint64_t *i) { (*i)++ } */
inc:

6
userland/arch/aarch64/str.S
View File

@@ -2,12 +2,12 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr x0, myvar
ASSERT_EQ(x0, 0x12346789ABCDEF0)
LKMC_ASSERT_EQ(x0, 0x12346789ABCDEF0)
#if 0
/* Error: invalid addressing mode at operand 2 -- `str x0,myvar' */
str x0, myvar
#endif
EXIT
LKMC_EXIT
myvar: .quad 0x12346789ABCDEF0

8
userland/arch/aarch64/ubfm.S
View File

@@ -2,16 +2,16 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr x19, =0x1122334455667788
// lsr alias: imms == 63
ldr x20, =0xFFFFFFFFFFFFFFFF
ubfm x20, x19, 16, 63
ASSERT_EQ(x20, 0x0000112233445566)
LKMC_ASSERT_EQ(x20, 0x0000112233445566)
ldr x20, =0xFFFFFFFFFFFFFFFF
ubfm x20, x19, 32, 63
ASSERT_EQ(x20, 0x0000000011223344)
EXIT
LKMC_ASSERT_EQ(x20, 0x0000000011223344)
LKMC_EXIT

8
userland/arch/aarch64/ubfx.S
View File

@@ -2,14 +2,14 @@
#include "common.h"
ENTRY
LKMC_ENTRY
ldr x19, =0x1122334455667788
ldr x20, =0xFFFFFFFFFFFFFFFF
ubfx x20, x19, 8, 16
ASSERT_EQ(x20, 0x0000000000006677)
LKMC_ASSERT_EQ(x20, 0x0000000000006677)
ldr x20, =0xFFFFFFFFFFFFFFFF
ubfx x20, x19, 8, 32
ASSERT_EQ(x20, 0x0000000044556677)
EXIT
LKMC_ASSERT_EQ(x20, 0x0000000044556677)
LKMC_EXIT

4
userland/arch/aarch64/udf.S
View File

@@ -2,9 +2,9 @@
#include "common.h"
ENTRY
LKMC_ENTRY
.long 0
#if 0
udf 0
#endif
EXIT
LKMC_EXIT

12
userland/arch/aarch64/x31.S
View File

@@ -2,7 +2,7 @@
#include "common.h"
ENTRY
LKMC_ENTRY
/* ERROR: can never use the name x31. */
#if 0
mov x31, 31
@@ -11,12 +11,12 @@ ENTRY
/* mov (register) is an alias for ORR, which accepts xzr. */
mov x19, 1
mov x19, xzr
ASSERT_EQ(x19, 0)
LKMC_ASSERT_EQ(x19, 0)
/* Same encoding as the mov version. */
mov x19, 1
orr x19, xzr, xzr
ASSERT_EQ(x19, 0)
LKMC_ASSERT_EQ(x19, 0)
/* So, orr, which is not an alias, can only take xzr, not sp. */
#if 0
@@ -26,7 +26,7 @@ ENTRY
/* Zero register discards result if written to. */
mov x19, 1
orr xzr, x19, x19
ASSERT_EQ(xzr, 0)
LKMC_ASSERT_EQ(xzr, 0)
/* MOV (to/from SP) is an alias for ADD (immediate). */
mov x19, sp
@@ -36,7 +36,7 @@ ENTRY
/* Exact same encoding as above. */
add x20, sp, 0
mov sp, x19
ASSERT_EQ(x20, 1)
LKMC_ASSERT_EQ(x20, 1)
/* So, ADD (immediate), which is not an alias, can only take sp, not xzr. */
#if 0
@@ -48,4 +48,4 @@ ENTRY
* does not say anything about SP, and so does accept xzr just fine.
*/
add xzr, xzr, xzr
EXIT
LKMC_EXIT