x86 asm: move rotation and bit instructoins in from x86-assembly-cheat

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Ciro Santilli 六四事件 法轮功
2019-06-16 00:00:03 +00:00
parent 89084d2332
commit 658ac53d0f
10 changed files with 313 additions and 0 deletions

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@@ -12378,6 +12378,63 @@ Bibliography:
* link:userland/arch/x86_64/or.S[OR]
* link:userland/arch/x86_64/xor.S[XOR]
=== x86 shift and rotate instructions
<<intel-manual-1>> 5.1.5 "Shift and Rotate Instructions"
* link:userland/arch/x86_64/shl.S[SHL and SHR]
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SHift left or Right and insert 0.
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CF == the bit that got shifted out.
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Application: quick unsigned multiply and divide by powers of 2.
* link:userland/arch/x86_64/sal.S[SAL and SAR]
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Application: signed multiply and divide by powers of 2.
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Mnemonics: Shift Arithmetic Left and Right
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Keeps the same sign on right shift.
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Not directly exposed in C, for which signed shift is undetermined behavior, but does exist in Java via the `>>>` operator. C compilers can omit it however.
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SHL and SAL are exactly the same and have the same encoding: https://stackoverflow.com/questions/8373415/difference-between-shl-and-sal-in-80x86/56621271#56621271
* link:userland/arch/x86_64/rol.S[ROL and ROR]
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Rotates the bit that is going out around to the other side.
* link:userland/arch/x86_64/rol.S[RCL and RCR]
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Like ROL and ROR, but insert the carry bit instead, which effectively generates a rotation of 8 + 1 bits. TODO application.
=== x86 bit and byte instructions
<<intel-manual-1>> 5.1.6 "Bit and Byte Instructions"
* link:userland/arch/x86_64/bt.S[BT]
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Bit test: test if the Nth bit a bit of a register is set and store the result in the CF FLAG.
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....
CF = reg[N]
....
* link:userland/arch/x86_64/btr.S[BTR]
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Do a BT and then set the bit to 0.
* link:userland/arch/x86_64/btc.S[BTC]
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Do a BT and then swap the value of the tested bit.
* link:userland/arch/x86_64/setcc.S[SETcc]
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Set a a byte of a register to 0 or 1 depending on the cc condition.
* link:userland/arch/x86_64/test.S[TEST]
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Like <<x86-binary-arithmetic-instructions,CMP>> but does AND instead of SUB:
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....
ZF = (!(X && Y)) ? 1 : 0
....
=== x86 control transfer instructions
<<intel-manual-1>> 5.1.7 "Control Transfer Instructions"