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atomic.cpp: split into several versions one per executable
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31
README.adoc
31
README.adoc
@@ -3899,25 +3899,28 @@ it fails with:
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ld: cannot find -lopenblas
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....
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[[cpp-static-and-pthreads]]
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===== C++ static and pthreads
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`g++` and pthreads also causes issues:
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* https://stackoverflow.com/questions/35116327/when-g-static-link-pthread-cause-segmentation-fault-why
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* https://stackoverflow.com/questions/58848694/gcc-whole-archive-recipe-for-static-linking-to-pthread-stopped-working-in-rec
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As a consequence, the following fails:
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As a consequence, the following just hangs as of LKMC ca0403849e03844a328029d70c08556155dc1cd0 + 1 the example link:userland/cpp/atomic/std_atomic.cpp[]:
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....
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./run --userland userland/cpp/atomic.cpp --static
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./run --userland userland/cpp/atomic/std_atomic.cpp --static
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....
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with error:
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And before that, it used to fail with other randomly different errors, e.g.:
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....
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qemu-x86_64: /path/to/linux-kernel-module-cheat/submodules/qemu/accel/tcg/cpu-exec.c:700: cpu_exec: Assertion `!have_mmap_lock()' failed.
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qemu-x86_64: /path/to/linux-kernel-module-cheat/submodules/qemu/accel/tcg/cpu-exec.c:700: cpu_exec: Assertion `!have_mmap_lock()' failed.
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....
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and if we manually build and run natively on host it segfaults.
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And a native Ubuntu 18.04 AMD64 run with static compilation segfaults.
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The workaround:
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@@ -13894,7 +13897,21 @@ Programs under link:userland/cpp/[] are examples of https://en.wikipedia.org/wik
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** link:userland/cpp/thread_get_id.cpp[] `std::thread::get_id`
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** link:userland/cpp/thread_return_value.cpp[]: how to return a value from a thread
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* https://en.cppreference.com/w/cpp/header/atomic[`<atomic>`]: <<cpp17>> 32 "Atomic operations library"
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** link:userland/cpp/atomic.cpp[]
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===== atomic.cpp
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link:userland/cpp/atomic/[]
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In this set of examples, we exemplify various synchronization mechanisms, including assembly specific ones, by using the convenience of C++ multithreading:
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* link:userland/cpp/atomic/main.hpp[]: contains all the code which is then specialized in spearated cpp files with macros
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* link:userland/cpp/atomic/aarch64_add.cpp[]: non synchronized aarch64 inline assembly
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* link:userland/cpp/atomic/aarch64_ldadd.cpp[]: synchronized aarch64 inline assembly
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* link:userland/cpp/atomic/fail.cpp[]: non synchronized C++ operator `++`
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* link:userland/cpp/atomic/mutex.cpp[]: synchronized `std::mutex`
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* link:userland/cpp/atomic/std_atomic.cpp[]: synchronized `std::atomic_ulong`
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* link:userland/cpp/atomic/x86_64_inc.cpp[]: non synchronized x86_64 inline assembly
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* link:userland/cpp/atomic/x86_64_lock_inc.cpp[]: synchronized x86_64 inline assembly
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[[cpp-standards]]
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==== C++ standards
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@@ -15456,7 +15473,7 @@ TODO We didn't manage to find a working ARM analogue to <<x86-rdtsc-instruction>
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==== x86 LOCK prefix
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Inline assembly example at: link:userland/cpp/atomic.cpp[]
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Inline assembly example at: link:userland/cpp/atomic/x86_64_lock_inc.cpp[], see also: <<atomic-cpp>>.
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Ensures that memory modifications are visible across all CPUs, which is fundamental for thread synchronization.
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@@ -16529,7 +16546,7 @@ That document then describes the SVE instructions and registers.
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<<armarm8-db>> "ARMv8.1-LSE, ARMv8.1 Large System Extensions"
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* LDADD: link:userland/cpp/atomic.cpp[]
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* LDADD: link:userland/cpp/atomic/aarch64_ldadd.cpp[], see also: <<atomic-cpp>>.
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Bibliography:
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