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Rationalize -mcpu for emulators, compilers and assemblers on ARM

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Move SVE example in from arm-assembly-cheat.

atomic.cpp aarch64 add LSE ldadd placeholder, not compiling yet
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Ciro Santilli 六四事件 法轮功
2019-06-26 00:00:00 +00:00
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@@ -14006,6 +14006,60 @@ There are analogous LD3 and LD4 instruction.
* assembly optimized libraries:
** https://github.com/projectNe10/Ne10
==== ARM SVE
Example: link:userland/arch/aarch64/sve.S[]
Scalable Vector Extension.
aarch64 only, newer than <<arm-neon>>.
It is called Scalable because it does not specify the vector width! Therefore we don't have to worry about new vector width instructions every few years! Hurray!
The instructions then allow implicitly tracking the loop index without knowing the actual vector length.
Added to QEMU use mode in 3.0.0.
TODO announcement date. Possibly 2017: https://alastairreid.github.io/papers/sve-ieee-micro-2017.pdf There is also a 2016 mention: https://community.arm.com/tools/hpc/b/hpc/posts/technology-update-the-scalable-vector-extension-sve-for-the-armv8-a-architecture
The Linux kernel shows `/proc/cpuinfo` compatibility as `sve`.
Official spec: https://developer.arm.com/docs/100891/latest/sve-overview/introducing-sve
===== SVE bibliography
* https://www.rico.cat/files/ICS18-gem5-sve-tutorial.pdf step by step of a complete code execution examples, the best initial tutorial so far
* https://alastairreid.github.io/papers/sve-ieee-micro-2017.pdf paper with some nice few concrete examples, illustrations and rationale
* https://static.docs.arm.com/dui0965/c/DUI0965C_scalable_vector_extension_guide.pdf
* https://developer.arm.com/products/software-development-tools/hpc/documentation/writing-inline-sve-assembly quick inlining guide
====== SVE spec
<<armarm8>> A1.7 "ARMv8 architecture extensions" says:
____
SVE is an optional extension to ARMv8.2. That is, SVE requires the implementation of ARMv8.2.
____
A1.7.8 "The Scalable Vector Extension (SVE)": then says that only changes to the existing registers are described in that manual, and that you should look instead at the "ARM Architecture Reference Manual Supplement, The Scalable Vector Extension (SVE), for ARMv8-A."
We then download the zip from: https://developer.arm.com/docs/ddi0584/latest/arm-architecture-reference-manual-supplement-the-scalable-vector-extension-sve-for-armv8-a and it contains the PDF: `DDI0584A_d_SVE_supp_armv8A.pdf` which we use here.
That document then describes the SVE instructions and registers.
=== ARMv8 architecture extensions
==== ARMv8.1 architecture extension
<<armarm8-db>> A1.7.3 "The ARMv8.1 architecture extension"
[[arm-lse]]
===== ARM Large System Extensions (LSE)
<<armarm8-db>> "ARMv8.1-LSE, ARMv8.1 Large System Extensions"
* LDADD: link:userland/cpp/atomic.cpp[]
=== ARM assembly bibliography
==== ARM non-official bibliography