diff --git a/README.adoc b/README.adoc index 7f952f0..c40b56e 100644 --- a/README.adoc +++ b/README.adoc @@ -4278,7 +4278,7 @@ If we start from the manually hacked working command from <> because of the se.py assert: +We choose <> because of the se.py assert: .... example/se.py:115: assert(options.cpu_type == "DerivO3CPU") @@ -13063,12 +13063,15 @@ All CPU types inherit from the `BaseCPU` class, and looking at the class hierarc * `BaseCPU` ** `BaseKvmCPU` -** `BaseSimpleCPU` +** `BaseSimpleCPU`: <> *** `AtomicSimpleCPU` *** `TimingSimpleCPU` -** `MinorO3CPU` +** `MinorO3CPU`: <> ** `BaseO3CPU` *** `FullO3CPU` +**** `DerivO3CPU : public FullO3CPU`: <> + +From this we see that there are basically only 4 C++ CPU models in gem5: Atomic, Timing, Minor and O3. All others are basically parametrizations of those base types. ==== List gem5 CPU types @@ -13130,13 +13133,8 @@ ex5 LITTLE core (based on the ARM Cortex-A7) ____ + Implemented by Pierre-Yves Péneau from LIRMM, which is a research lab in Montpellier, France, in 2017. -* `O3_ARM_v7a`: implemented by Ronald Dreslinski from the https://en.wikipedia.org/wiki/University_of_Michigan[University of Michigan] in 2012 -+ -Not sure why it has v7a in the name, since I believe the CPUs are just the microarchitectural implementation of any ISA, and the v8 hello world did run. -+ -The CLI option is named slightly differently as: `--cpu-type O3_ARM_v7a_3`. -===== gem5 DeriveO3CPU +===== gem5 DerivO3CPU Generic out-of-order core. "O3" Stands for "Out Of Order"! @@ -13149,6 +13147,11 @@ Existing parametrizations: ____ ex5 big core (based on the ARM Cortex-A15) ____ +* `O3_ARM_v7a`: implemented by Ronald Dreslinski from the https://en.wikipedia.org/wiki/University_of_Michigan[University of Michigan] in 2012 ++ +Not sure why it has v7a in the name, since I believe the CPUs are just the microarchitectural implementation of any ISA, and the v8 hello world did run. ++ +The CLI option is named slightly differently as: `--cpu-type O3_ARM_v7a_3`. ==== gem5 ARM RSK