arm baremetal: svc, get closer but not there yet

This commit is contained in:
Ciro Santilli 六四事件 法轮功
2019-02-06 00:00:00 +00:00
parent abd61a153a
commit 1e2b7f1e5e
4 changed files with 162 additions and 26 deletions

View File

@@ -19,6 +19,11 @@
SYSREG_READ(name, type) \
SYSREG_WRITE(name, type)
SYSREG_READ_WRITE(uint32_t, daif)
SYSREG_READ_WRITE(uint32_t, spsel)
SYSREG_READ_WRITE(uint64_t, sp_el1)
SYSREG_READ_WRITE(uint64_t, vbar_el1)
#define SVC(immediate) __asm__ __volatile__("svc " #immediate : : : )
#endif

View File

@@ -1,28 +1,34 @@
#include <stdio.h>
#include <inttypes.h>
#include <stdio.h>
#include <stdlib.h>
#include <common.h>
#include "common_aarch64.h"
/* Masks each of the 4 exception types: Synchronous, System error,
* IRQ and FIQ.
*/
SYSREG_READ_WRITE(uint32_t, daif)
/* Determines if we use SP0 or SPx. Default: SP0.
* See also: https://stackoverflow.com/questions/29393677/armv8-exception-vector-significance-of-el0-sp
*/
SYSREG_READ_WRITE(uint32_t, spsel)
/* Jump to this SP if spsel == SPx. */
SYSREG_READ_WRITE(uint64_t, sp_el1)
void handle_svc() {
exit(0);
}
int main(void) {
/* View initial register values. */
printf("daif 0x%" PRIx32 "\n", sysreg_daif_read());
printf("spsel 0x%" PRIx32 "\n", sysreg_spsel_read());
printf("vbar_el1 0x%" PRIx64 "\n", sysreg_vbar_el1_read());
/* Set registers to the values that we need. */
sysreg_daif_write(0);
sysreg_vbar_el1_write(0);
printf("daif 0x%" PRIx32 "\n", sysreg_daif_read());
printf("spsel 0x%" PRIx32 "\n", sysreg_spsel_read());
printf("vbar_el1 0x%" PRIx64 "\n", sysreg_vbar_el1_read());
/* TODO this breaks execution because reading system registers that end
* in ELx "trap", leading into an exception on the upper EL.
*/
/*printf("sp_el1 0x%" PRIx64 "\n", sysreg_sp_el1_read());*/
/*SVC(0);*/
/* Should never be reached. */
/*common_assert_fail();*/
return 0;
}