arm: sve_addvl test program that prints sve length

README.adoc

@@ -16219,7 +16219,9 @@ There are analogous LD3 and LD4 instruction.
 
 Scalable Vector Extension.
 
-Example: link:userland/arch/aarch64/sve.S[]
+Examples:
+
+* link:userland/arch/aarch64/sve.S[]
 
 To understand it, the first thing you have to look at is the execution example at Fig 1 of: https://alastairreid.github.io/papers/sve-ieee-micro-2017.pdf
 
@@ -16244,6 +16246,41 @@ SVE support is indicated by `ID_AA64PFR0_EL1.SVE` which is dumped from link:bare
 
 Using SVE normally requires setting the CPACR_EL1.FPEN and ZEN bits, which as as of lkmc 29fd625f3fda79f5e0ee6cac43517ba74340d513 + 1 we also enable in our <<baremetal-bootloaders>>, see also: <<aarch64-baremetal-neon-setup>>.
 
+===== ARM SVE VADDL instruction
+
+Get the SVE vector length. The following programs do that and print it to stdout:
+
+* link:userland/arch/aarch64/inline_asm/sve_addvl.c[]
+* link:userland/arch/aarch64/sve_addvl.S[]
+
+===== Change ARM SVE vector length in emulators
+
+gem5 covered at: https://stackoverflow.com/questions/57692765/how-to-change-the-gem5-arm-sve-vector-length
+
+It is fun to observe this directly with the <<arm-sve-vaddl-instruction>> in SE:
+
+....
+./run --arch aarch64 --userland userland/arch/aarch64/sve_addvl.S --static --emulator gem5 -- --param 'system.cpu[:].isa[:].sve_vl_se = 1'
+./run --arch aarch64 --userland userland/arch/aarch64/sve_addvl.S --static --emulator gem5 -- --param 'system.cpu[:].isa[:].sve_vl_se = 2'
+./run --arch aarch64 --userland userland/arch/aarch64/sve_addvl.S --static --emulator gem5 -- --param 'system.cpu[:].isa[:].sve_vl_se = 4'
+....
+
+which consecutively:
+
+....
+0x0000000000000080
+0x0000000000000100
+0x0000000000000200
+....
+
+which are multiples of 128.
+
+TODO how to set it on QEMU at runtime? As of LKMC 37b93ecfbb5a1fcbd0c631dd0b42c5b9f2f8a89a + 1 QEMU outputs:
+
+....
+0x0000000000000800
+....
+
 ===== SVE bibliography
 
 * https://www.rico.cat/files/ICS18-gem5-sve-tutorial.pdf step by step of a complete code execution examples, the best initial tutorial so far

path_properties.py

@@ -15,6 +15,7 @@ class PathProperties:
         # Therefore, it cannot be run in baremetal ARMv7 CPUs.
         # User mode simulation however seems to enable aarch32 so these run fine.
         'arm_aarch32': False,
+        'arm_sve': False,
         # Examples that can be built in baremetal.
         'baremetal': False,
         'c_std': default_c_std,
@@ -155,6 +156,10 @@ class PathProperties:
             not (
                 link and
                 self['no_executable']
+            ) and not (
+                # Our C compiler does not suppport SVE yet.
+                # https://github.com/cirosantilli/linux-kernel-module-cheat/issues/87
+                os.path.splitext(self.path_components[-1])[1] == '.c' and self['arm_sve']
             )
         )
 
@@ -412,6 +417,7 @@ path_properties_tuples = (
                                     },
                                     {
                                         'freestanding': freestanding_properties,
+                                        'sve_addvl.c': {'arm_sve': True},
                                     },
                                 ),
                                 'freestanding': freestanding_properties,
@@ -422,7 +428,8 @@ path_properties_tuples = (
                                     'signal_generated_by_os': True,
                                     'signal_received': signal.Signals.SIGILL,
                                 },
-                                'sve.S': {'gem5_unimplemented_instruction': True}
+                                'sve.S': {'arm_sve': True},
+                                'sve_addvl.S': {'arm_sve': True},
                             }
                         ),
                         'x86_64': (

userland/arch/aarch64/inline_asm/sve_addvl.c

@@ -0,0 +1,15 @@
+/* https://cirosantilli.com/linux-kernel-module-cheat#arm-sve-vaddl-instruction */
+
+#include <inttypes.h>
+#include <stdio.h>
+
+int main(void) {
+    uint64_t vl = 0;
+    __asm__ (
+        "addvl %[vl], %[vl], #8"
+        : [vl] "+r" (vl)
+        :
+        :
+    );
+    printf("0x%" PRIX64 "\n", vl);
+}

userland/arch/aarch64/sve_addvl.S

@@ -0,0 +1,10 @@
+/* https://cirosantilli.com/linux-kernel-module-cheat#arm-sve-vaddl-instruction */
+
+#include <lkmc.h>
+
+LKMC_PROLOGUE
+    mov x0, 0
+    addvl x0, x0, 8
+    bl lkmc_print_hex_64
+    bl lkmc_print_newline
+LKMC_EPILOGUE