# Linux Kernel Module Cheat

##### 33.10.2.1. ARMv8 exception vector table format

The vector table format is described on ARMv8 architecture reference manual Table D1-7 "Vector offsets from vector table base address".

A good representation of the format of the vector table can also be found at Programmer’s Guide for ARMv8-A Table 10-2 "Vector table offsets from vector table base address".

The first part of the table contains: Table 6, “Summary of ARMv8 vector handlers”.

Table 6. Summary of ARMv8 vector handlers
Address | Exception type | Description
--- | --- | ---
VBAR_ELn + 0x000 | Synchronous | Current EL with SP0
VBAR_ELn + 0x080 | IRQ/vIRQ | Current EL with SP0
VBAR_ELn + 0x100 | FIQ/vFIQ | Current EL with SP0
VBAR_ELn + 0x180 | SError/vSError | Current EL with SP0
VBAR_ELn + 0x200 | Synchronous | Current EL with SPx
VBAR_ELn + 0x280 | IRQ/vIRQ | Current EL with SPx
VBAR_ELn + 0x300 | FIQ/vFIQ | Current EL with SPx
VBAR_ELn + 0x380 | SError/vSError | Lower EL using AArch64
VBAR_ELn + 0x400 | Synchronous | Lower EL using AArch64
VBAR_ELn + 0x480 | IRQ/vIRQ | Lower EL using AArch64
VBAR_ELn + 0x500 | FIQ/vFIQ | Lower EL using AArch64
VBAR_ELn + 0x580 | SError/vSError | Lower EL using AArch64
VBAR_ELn + 0x600 | Synchronous | Lower EL using AArch32
VBAR_ELn + 0x680 | IRQ/vIRQ | Lower EL using AArch32
VBAR_ELn + 0x700 | FIQ/vFIQ | Lower EL using AArch32
VBAR_ELn + 0x780 | SError/vSError | Lower EL using AArch32

and the following other parts are analogous, but referring to SPx and lower ELs.

Now, to fully understand this table, we need the following concepts:

- Synchronous: what happens for example when we do an ARM SVC instruction.

  It is called synchronous because the CPU is generating it itself from an instruction, unlike an interrupt generated by a device like a keyboard, which ends up in an IRQ or FIQ

- IRQ: an example can be found at: ARM timer

- TODO FIQ vs IRQ

- TODO SError

- EL changes: ARM change exception level

- SP0 vs SPx: ARM SP0 vs SPx.