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Improve makefiles

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Added the use of the $(MAKE) variable to support 'gnumake'.
Fixed an issue with some make compile rule and the -o option.
All targets are removed from the build directory when running 'make clean'.
This commit is contained in:
Micha Hoiting
2012-11-05 16:47:55 +01:00
parent 82c6df459c
commit f0ea84ce35
5 changed files with 18 additions and 19 deletions
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8
examples/Makefile
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@@ -1,7 +1,7 @@
all:
cd embedded_ui; make all
cd driver_testing; make all
cd embedded_ui; $(MAKE) all
cd driver_testing; $(MAKE) all
clean:
cd embedded_ui; make clean
cd driver_testing; make clean
cd embedded_ui; $(MAKE) clean
cd driver_testing; $(MAKE) clean

6
examples/driver_testing/Makefile
View File

@@ -30,10 +30,8 @@ clean:
@echo " rm -f *~"
rm -f *~
@echo "Removing programs"
@echo " rm -f "$(C_PROGNAME)
rm -f $(C_PROGNAME)
@echo " rm -f "$(CPP_PROGNAME) $(TEMPLATE_PROGNAME)
rm -f $(CPP_PROGNAME) $(TEMPLATE_PROGNAME)
@echo " rm -f $(CPP_PROGNAME_NOFFF) $(CPP_PROGNAME_FFF) $(TEMPLATE_PROGNAME)"
rm -f $(CPP_PROGNAME_NOFFF) $(CPP_PROGNAME_FFF) $(TEMPLATE_PROGNAME)
$(BUILD_DIR)/%.o: %.c